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e4ef199b83
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Fixed a memory corruption bug
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2023-05-10 08:35:14 +01:00 |
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7e612bb701
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made BIU snoop into the processor to deliver new instructions faster and fixed some bugs
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2023-05-10 08:31:14 +01:00 |
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c854818d6d
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Tightened up write timing
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2023-05-10 04:43:09 +01:00 |
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b7bfbd4e33
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Improved BIU performance and debug messages
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2023-05-10 04:05:56 +01:00 |
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da51dd6da7
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First draft of a bus interface unit in an effort to make the CPU pipelined. Currently supports code prefetching
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2023-05-07 13:34:15 +01:00 |
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88a47cc4a9
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Slight change in REAMDE's wording
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2023-05-04 03:47:25 +01:00 |
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133bd33a9c
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Added definition of the version names to README
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2023-05-04 03:43:44 +01:00 |
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f4b22951d0
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Cleaned up some pieces of code and fixed a bug
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2023-05-04 00:49:04 +01:00 |
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1fd58fd62e
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Added a background to the high level diagram picture to make it viewable on dark mode
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2023-05-03 17:48:24 +01:00 |
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bd7610879f
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Removed erroneous file and run aspell
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2023-03-21 14:51:39 +00:00 |
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c25d2eaf19
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Added a high level state diagram of the processor
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2023-03-21 12:38:35 +00:00 |
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2f9a8fa236
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Improved DOS char print code
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2023-03-14 07:20:30 +00:00 |
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82baacfd5b
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Fixed race condition giving garbage data on debug register write prints and ordering of reg write and instr fetch debug prints
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2023-03-12 08:55:40 +00:00 |
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9230900b75
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fixed verilator lint warnings relating code enabled with debug options from config.v
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2023-03-12 08:12:01 +00:00 |
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aabe62b4c9
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Added missing copyright and license notice
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2023-03-09 06:13:34 +00:00 |
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11624ca2d2
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Added the OUT instruction to be able to properly address I/O and moved printing logic to a device on the I/O space. Also added IRET which is basically just a RET in this case
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2023-03-09 06:03:13 +00:00 |
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9de83fd7c1
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Added partial support for the software interrupt INT instruction
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2023-03-08 07:26:28 +00:00 |
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d93c92c005
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Slight adjustment to README
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2023-03-06 21:57:36 +00:00 |
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8070d4e58a
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Improved build system's handling of verilator
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2023-03-05 23:11:18 +00:00 |
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e8b84a38b6
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Updated README.md about verilator
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2023-03-05 06:37:07 +00:00 |
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99cbc49e95
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Wrote a more complete testbench for verilator, switched from lx2 to fst and fixed cpu clock frequency calculation
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2023-03-05 00:10:55 +00:00 |
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5705b8e8a5
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Added support for Verilator!
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2023-03-04 08:37:43 +00:00 |
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ba52ff89e6
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Fixed most problems verilator's linter found
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2023-03-04 06:22:28 +00:00 |
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59ec1b7a15
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Removed remnants of the old memory addressing system
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2023-03-03 20:43:25 +00:00 |
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b00cd988cf
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Cleaned up boot_code
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2023-03-03 19:36:28 +00:00 |
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e1bb98c0f0
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Updated toolchain versions and run project through aspell
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2023-03-03 06:54:33 +00:00 |
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f60084344e
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Overhauled cpu frontend. Made memory byte addressable (necessary), cleaned up state machine and fixed small bug with MOV
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2023-03-03 06:29:06 +00:00 |
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70a9ce6368
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Forgot to remove it from proc_state_def.v
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2023-02-26 02:48:39 +00:00 |
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f7d76f1944
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Removed useless state in the state machine and ran the project through aspell
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2023-02-26 02:46:43 +00:00 |
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0c36e9d78c
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Added message about compilation process on the compiler and fixed Makefile dependencies
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2023-02-25 01:42:45 +00:00 |
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6e8d951360
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Increased the accessible memory and got the Mandelbrot renderer working under the brainfuck compiler!
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2023-02-24 17:38:23 +00:00 |
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6ea34a3525
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Added MOV Immidiate to REG/MEM
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2023-02-24 15:25:45 +00:00 |
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5af6d720c3
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Fixed ADD again and some memory read logic. Compiler runs the default brainfuck message program!!
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2023-02-24 14:10:07 +00:00 |
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3e484a0ceb
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Added register indirect unconditional jump
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2023-02-24 13:04:32 +00:00 |
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9ed3dc3312
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Fixed bug introduced in a previous commit about fixing ADD
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2023-02-24 12:48:03 +00:00 |
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96b7a4d298
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Added the SUB instruction (piggybacking off of ADD) AND THE COMPILER FINISHES GENERATING CODE!!
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2023-02-24 12:47:32 +00:00 |
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808827cbdd
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Fixed arg bug in ADD
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2023-02-24 11:54:13 +00:00 |
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355c673a37
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Added a POP instruction
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2023-02-24 11:31:15 +00:00 |
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c3580848de
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Added bitwise TEST instruction
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2023-02-24 10:08:01 +00:00 |
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abee49d6c3
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Implemented PUSH instruction, fixed register addressing bug and a RET bug
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2023-02-24 07:32:27 +00:00 |
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a189da249c
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Added STOS instruction. Native brainfuck compiler started generating code!
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2023-02-24 05:01:55 +00:00 |
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e684db8348
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Added support to CMP for compare memory to opcode parameter, added support for both PROC_DE_LOAD_?_PARAM and PROC_MEMIO_READ at the same command and associated changes
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2023-02-24 02:18:48 +00:00 |
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c4ac55d4c3
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Implemented the RET instruction,fixed CALL bug, clarified MOD naming and usage
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2023-02-23 14:48:48 +00:00 |
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1efef45266
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Added missing license notices
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2023-02-22 01:58:08 +00:00 |
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cac01f0333
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Fixed Makefile bug
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2023-02-22 01:51:14 +00:00 |
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7fde422341
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Added Microcode support, Stack, implemented the CALL instruction in microcode and grouped the wires on the decoder module
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2023-02-22 01:28:23 +00:00 |
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619702384b
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Wrote an optimised native brainfuck compiler intended to be the default program running on release v0.1 utilising a good precentage of the 8086 instruction set
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2023-02-19 21:42:59 +00:00 |
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e2e9a92832
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Cleaned the decoder a bit and laid down some of the groundwork for microcode
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2023-02-19 16:22:23 +00:00 |
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e6c9c722e3
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Run the project through aspell and tweaked the README
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2023-02-19 00:52:52 +00:00 |
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fd4a9b5442
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Fixed register addressing bug, mem read endianness, cleaned up code and added a provisional project logo
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2023-02-19 00:20:53 +00:00 |
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