c527a053a6
Peripherals/ascii_to_HD44780_driver: Added support for the \e[H and \e[2J escape codes to clear the screen after the i2c_bootloader is done
2024-02-11 04:35:44 +00:00
aac55f7038
I2C_BOOTLOADER: Added support for error handling
2024-02-10 22:35:33 +00:00
a8c29aff9b
I2C_BOOTLOADER: Several fixes and a 4.5x performance increase as well as the addition of 16bit reads from the I2C_driver
2024-02-10 19:42:18 +00:00
be402aa8f7
Project: updated copyright notices and README and fixed a few spelling mistakes
2024-02-10 15:52:13 +00:00
1966ab78b4
Peripherals/I2C: Added a CPU I2C driver and wrote a bootloader that uses that to boot from an I2C eeprom
...
I'm happy to have reached 200 commits and with this, version v0.3.0 is functionally ready. I still need to do a fair bit of cleanup and bug fixing though before the actual release. With this commit I added a CPU I2C driver as well as a basic arbiter to have the hardware lcd controller and the software i2c communication pass through the same I2C driver and I2C bus. I also wrote a bootloader that reads code from an i2c eeprom to make sure the hardware works.
2024-02-09 23:30:58 +00:00
1d9be44c5a
Build system: renamed upload to upload_bitstream to allow for an upload_firmware in the future
2024-01-22 20:19:14 +00:00
8281c9a21f
FPGA_Board/OrangeCrab_r0.2.1: Switched the GPIO 0/1 pins for I2C to the dedicated ones
2023-12-10 04:37:07 +00:00
3e66336456
Build system: Small fixes and corrected rebuild when only the verilator testbench was changed
2023-12-09 02:39:14 +00:00
65dfd21ef0
Peripherals/I2C_driver: Uncommented code to check for device acknowledgment
2023-12-09 00:53:52 +00:00
94bc6eba39
Build system: Added help text and target mrproper which also deletes downloaded source code
2023-12-08 22:10:11 +00:00
8544764612
Build system: Minor improvement and addition of license notice to one of the files
2023-12-07 19:21:31 +00:00
bc1dcacfc0
Build system: Fixed a bug with building the boot_code/ directory with a lot of make jobs
2023-12-07 18:45:29 +00:00
533f346f9b
Build system: Added the ability to simulate an FPGA SoC and fixed all the warning verilator gave of the code previously used only for synthesis.
2023-12-07 16:39:04 +00:00
48249e8051
Forgot to add some of the files for the previous commit
2023-12-06 18:38:32 +00:00
b1108e375d
Build system: Fixed standalone ./system/Makefile build and general Makefile improvements
2023-12-06 18:13:24 +00:00
df5b9c13ea
Project: Removed some unused verilator warning restrictions and a TODO comment
2023-12-06 02:46:39 +00:00
05343864da
Build system: Added a script that uses docker to test building the project on some popular linux distros
2023-12-06 01:22:07 +00:00
c1e597feba
Build system: added handling for building on systems without git
2023-12-06 00:23:24 +00:00
8edafd70cf
Build system: Improved the handling of seeds, moved most of the board specific build instructions to the board specific .mk file and fixed bios.asm dependencies
2023-12-05 21:46:56 +00:00
dc7c4e95f2
Boot_code/Brainfuck_compiler: revert accidental increase in the stack size
2023-12-05 03:16:21 +00:00
acc0581124
Boot_code/BIOS: Split the litedram init off to a separate file and included the brainfuck compiler in the bios as a demo for the ram. Also added code to zero out the brainfuck data in the compiler
2023-12-05 03:09:23 +00:00
2fcc521f12
Peripherals/Wishbone_memory: Rewrote the module to be more efficient, smaller and also support byte level addressing. It is correct enough now to run code out of!
2023-12-05 02:50:21 +00:00
dd1080b42c
Build system: Added maximum CPU frequency to build system info and improved the way nextpnr seed is handled, fixing builds with older versions of make
2023-12-05 01:13:43 +00:00
dd50114c07
Build system: fixed adherence to the Makefile QUIET variable
2023-12-04 23:09:13 +00:00
26210be950
Peripherals/I2C_driver: Corrected the implementation of the bidirectional SDA pin, fixing the final yosys 0.35 warning
2023-12-04 22:40:53 +00:00
8fb6dadf48
Documentation: Updated README.md with the improvements in gen_litedram.sh
2023-12-04 22:32:21 +00:00
0eecfdcf40
Tools/Gen_litedram: Major improvements and cleanup including work in ensuring it is reproducible
2023-12-04 21:36:48 +00:00
8c921380bc
Peripherals/BuiltinRam: Fixed high impedance warning in yosys
2023-12-04 17:04:22 +00:00
374b1946e9
Added .keep file for intentionally empty directory
2023-12-03 19:30:59 +00:00
63ea29e399
Peripherals/Memory: Added support for the litedram DDR memory controller, created a new memory map and updated all relevant code and files including the addition of rudimentary wait state support for the cpu (BIU)
2023-12-03 19:24:39 +00:00
f1dc9d8a59
Processor/Instructions: Fixed a bug where if IN executed after a microcoded instruction the cpu would go into undefined behavior
2023-11-26 00:18:15 +00:00
f07e0e7c1f
Processor/Instructions: Added support for the IN <immediate> instruction. Also changed some stuff in system.v to add more devices in the IO/Memory space
2023-11-25 04:12:05 +00:00
17638d5cbd
Build system: Slight improvements, randomised nextpnr rng seed and printed it to the terminal. In case timing fails running it a bunch of times can yield one value that passes.
2023-11-23 23:27:19 +00:00
aedefddb5d
Project: The cpu finally works perfectly now even at full speed as far as i can tell! I made the ram and register writes synchronous which fixed the weird issues I had, then I added -abc9 to yosys so that nextpnr can actually route the cpu at full speed and increased the display fifo since the cpu is so fast now!!
2023-11-15 18:43:56 +00:00
29bc2e6d96
Project: Cleaned up some code and run the project through aspell
2023-11-15 14:37:46 +00:00
98d30a1813
Project: removed a .fst.hier file thought to be generated by gtkwave and added the type to gitignore
2023-11-15 00:32:40 +00:00
09ccce5f30
Peripherals/HD44780: Rewrote and cleaned up a lot of the driver code. Unfortunately what i think is a very weird bug in yosys is still affecting the codebase
2023-11-15 00:26:46 +00:00
0ca1da81b1
Assembly code: Fixed a bug where the compiler would print a null byte which was masked by the verilog simulators
2023-11-14 21:14:45 +00:00
2c8e8a9d9c
Added simple support for \n and \r on the HD44780 driver, increased the synthesised mem to fit brainfuck_compiled.asm and made it the default.
2023-11-12 21:39:27 +00:00
189b037bdf
Added proper line wrapping for HD44780 LCDs and rewrote half the driver to make it more flexible
2023-11-12 17:30:52 +00:00
618c3102d8
Fixed some dependencies on the makefiles
2023-11-12 13:30:12 +00:00
7d2cb5672f
Reduced numbers to be sorted in gnome_sort.asm to fit in lcd, fixed hlt on real hardware, slowed down cpu, increased lcd fifo and with that I almost got gnome_sort.asm working perfectly on real hardware
2023-11-12 07:31:05 +00:00
e06c0eeaa0
Made the build system simplify the microcode so that yosys understands and synthesises it! Now gnome_sort.asm almost works!
2023-11-12 04:04:56 +00:00
fa62b07c14
Removed probably unnecessary high impedance case yosys was complaining about in registers.v
2023-11-12 03:13:22 +00:00
f471b305d8
Switched some assignments in decode.v to non-blocking which fixed a seemingly unrelated bug with incrementing the accumulator, added some more working test code in colored_led.asm and did some semantic changes as per yosys suggestions
2023-11-12 02:54:41 +00:00
4c130a8d63
Added back removed warnings to verilator since we have now fixed those issues
2023-11-12 00:07:33 +00:00
09b3d51015
Added statistics to place&route
2023-11-09 23:10:06 +00:00
863af26422
Forgot to add the changes to colored_led.asm from the previous commit
2023-11-09 23:08:12 +00:00
a88c420ca5
Added an I2C driver, a PCF8574 driver and an HD44780 display driver. Unfortunately this shows that even fibonacci doesn't run correctly. Nonetheless, I made colored_led.asm output text to the display!
2023-11-09 22:10:55 +00:00
e0dc7bae07
Move the diagram below some text since it looks a bit ugly this way
2023-11-07 14:40:51 +00:00
