df342467c7Saved a clock cycle from microcode starts and added info in decode to allow saving a cycle on almost every instruction(Tim) Efthimis Kritikos2023-05-13 13:45:15 +0100
fe0426a77bMade execute unit run in parallel with everything else. Still not parallel for most of the time though(Tim) Efthimis Kritikos2023-05-13 06:51:35 +0100
da51dd6da7First draft of a bus interface unit in an effort to make the CPU pipelined. Currently supports code prefetching(Tim) Efthimis Kritikos2023-05-07 13:34:15 +0100
82baacfd5bFixed race condition giving garbage data on debug register write prints and ordering of reg write and instr fetch debug prints(Tim) Efthimis Kritikos2023-03-12 08:53:21 +0000
9230900b75fixed verilator lint warnings relating code enabled with debug options from config.v(Tim) Efthimis Kritikos2023-03-12 08:12:01 +0000
11624ca2d2Added the OUT instruction to be able to properly address I/O and moved printing logic to a device on the I/O space. Also added IRET which is basically just a RET in this case(Tim) Efthimis Kritikos2023-03-09 06:02:41 +0000
99cbc49e95Wrote a more complete testbench for verilator, switched from lx2 to fst and fixed cpu clock frequency calculation(Tim) Efthimis Kritikos2023-03-05 00:10:55 +0000
f60084344eOverhauled cpu frontend. Made memory byte addressable (necessary), cleaned up state machine and fixed small bug with MOV(Tim) Efthimis Kritikos2023-03-03 06:29:06 +0000
f7d76f1944Removed useless state in the state machine and ran the project through aspell(Tim) Efthimis Kritikos2023-02-26 02:46:43 +0000
0c36e9d78cAdded message about compilation process on the compiler and fixed Makefile dependencies(Tim) Efthimis Kritikos2023-02-25 01:42:09 +0000
6e8d951360Increased the accessible memory and got the Mandelbrot renderer working under the brainfuck compiler!(Tim) Efthimis Kritikos2023-02-24 17:36:41 +0000
5af6d720c3Fixed ADD again and some memory read logic. Compiler runs the default brainfuck message program!!(Tim) Efthimis Kritikos2023-02-24 14:09:10 +0000
96b7a4d298Added the SUB instruction (piggybacking off of ADD) AND THE COMPILER FINISHES GENERATING CODE!!(Tim) Efthimis Kritikos2023-02-24 12:18:17 +0000
e684db8348Added support to CMP for compare memory to opcode parameter, added support for both PROC_DE_LOAD_?_PARAM and PROC_MEMIO_READ at the same command and associated changes(Tim) Efthimis Kritikos2023-02-24 02:18:48 +0000
c4ac55d4c3Implemented the RET instruction,fixed CALL bug, clarified MOD naming and usage(Tim) Efthimis Kritikos2023-02-23 14:48:48 +0000
7fde422341Added Microcode support, Stack, implemented the CALL instruction in microcode and grouped the wires on the decoder module(Tim) Efthimis Kritikos2023-02-22 01:28:23 +0000
619702384bWrote an optimised native brainfuck compiler intended to be the default program running on release v0.1 utilising a good precentage of the 8086 instruction set(Tim) Efthimis Kritikos2023-02-19 21:42:59 +0000
e2e9a92832Cleaned the decoder a bit and laid down some of the groundwork for microcode(Tim) Efthimis Kritikos2023-02-19 16:22:23 +0000
fd4a9b5442Fixed register addressing bug, mem read endianness, cleaned up code and added a provisional project logo(Tim) Efthimis Kritikos2023-02-19 00:20:53 +0000
82bd859874Moved the decoding of opcodes into a separate module and optimised memory reads(Tim) Efthimis Kritikos2023-02-17 18:08:09 +0000
5e0c990394It is Turing complete! Running the Mandelbrot renderer with the brainfuck interpreter. Improved addressing modes and added CMP immediate with register instruction(Tim) Efthimis Kritikos2023-02-15 03:53:05 +0000
f4d28cf4c8Added 16bit unaligned register indirect writes, fixed some MOV bugs, clean up code names and data flow(Tim) Efthimis Kritikos2023-02-15 01:28:02 +0000
0d4221f9deAdded config file (mainly for debug verbosity) and kind of patched some weird behaviour when clock is stopped(Tim) Efthimis Kritikos2023-02-13 15:24:21 +0000
0901af23dbAdded support for some register indirect addressing modes. Also added documentation comments and did some general cleanup(Tim) Efthimis Kritikos2023-02-11 20:27:28 +0000
d7eb4f36c0Wrote very basic brainfuck interpreter in 8086 asm to work on making it run and prove Turing completeness(Tim) Efthimis Kritikos2023-02-11 01:11:37 +0000
fc4ecdb8d2Added HLT instruction, made testbench count total clock cycles and write memdump and fixed reset timing(Tim) Efthimis Kritikos2023-02-10 18:20:28 +0000
39f55aa6c3Added unaligned access for instructions and data and fixed register file access(Tim) Efthimis Kritikos2023-02-10 12:02:20 +0000
185efe9d85Improved execution state logic, cleaned up code and fixed register file output enable(Tim) Efthimis Kritikos2023-02-10 01:45:27 +0000
a5571fda12Added a very basic execution stage, registers and a very crude adder for ALU. It finally executes instructions!(Tim) Efthimis Kritikos2023-02-09 20:16:50 +0000
(Tim) Efthimis Kritikos