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533f346f9b
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Build system: Added the ability to simulate an FPGA SoC and fixed all the warning verilator gave of the code previously used only for synthesis.
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2023-12-07 16:39:04 +00:00 |
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2fcc521f12
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Peripherals/Wishbone_memory: Rewrote the module to be more efficient, smaller and also support byte level addressing. It is correct enough now to run code out of!
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2023-12-05 02:50:21 +00:00 |
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26210be950
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Peripherals/I2C_driver: Corrected the implementation of the bidirectional SDA pin, fixing the final yosys 0.35 warning
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2023-12-04 22:40:53 +00:00 |
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63ea29e399
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Peripherals/Memory: Added support for the litedram DDR memory controller, created a new memory map and updated all relevant code and files including the addition of rudimentary wait state support for the cpu (BIU)
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2023-12-03 19:24:39 +00:00 |
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aedefddb5d
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Project: The cpu finally works perfectly now even at full speed as far as i can tell! I made the ram and register writes synchronous which fixed the weird issues I had, then I added -abc9 to yosys so that nextpnr can actually route the cpu at full speed and increased the display fifo since the cpu is so fast now!!
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2023-11-15 18:43:56 +00:00 |
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29bc2e6d96
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Project: Cleaned up some code and run the project through aspell
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2023-11-15 14:37:46 +00:00 |
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09ccce5f30
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Peripherals/HD44780: Rewrote and cleaned up a lot of the driver code. Unfortunately what i think is a very weird bug in yosys is still affecting the codebase
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2023-11-15 00:26:46 +00:00 |
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2c8e8a9d9c
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Added simple support for \n and \r on the HD44780 driver, increased the synthesised mem to fit brainfuck_compiled.asm and made it the default.
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2023-11-12 21:39:27 +00:00 |
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189b037bdf
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Added proper line wrapping for HD44780 LCDs and rewrote half the driver to make it more flexible
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2023-11-12 17:30:52 +00:00 |
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a88c420ca5
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Added an I2C driver, a PCF8574 driver and an HD44780 display driver. Unfortunately this shows that even fibonacci doesn't run correctly. Nonetheless, I made colored_led.asm output text to the display!
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2023-11-09 22:10:55 +00:00 |
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