Commit Graph

30 Commits

Author SHA1 Message Date
a8ab6b2dc7 Separated the execution unit from decode 2023-05-11 12:22:49 +01:00
7e612bb701 made BIU snoop into the processor to deliver new instructions faster and fixed some bugs 2023-05-10 08:31:14 +01:00
b7bfbd4e33 Improved BIU performance and debug messages 2023-05-10 04:05:56 +01:00
da51dd6da7 First draft of a bus interface unit in an effort to make the CPU pipelined. Currently supports code prefetching 2023-05-07 13:34:15 +01:00
f4b22951d0 Cleaned up some pieces of code and fixed a bug 2023-05-04 00:49:04 +01:00
bd7610879f Removed erroneous file and run aspell 2023-03-21 14:51:39 +00:00
11624ca2d2 Added the OUT instruction to be able to properly address I/O and moved printing logic to a device on the I/O space. Also added IRET which is basically just a RET in this case 2023-03-09 06:03:13 +00:00
9de83fd7c1 Added partial support for the software interrupt INT instruction 2023-03-08 07:26:28 +00:00
ba52ff89e6 Fixed most problems verilator's linter found 2023-03-04 06:22:28 +00:00
59ec1b7a15 Removed remnants of the old memory addressing system 2023-03-03 20:43:25 +00:00
f60084344e Overhauled cpu frontend. Made memory byte addressable (necessary), cleaned up state machine and fixed small bug with MOV 2023-03-03 06:29:06 +00:00
f7d76f1944 Removed useless state in the state machine and ran the project through aspell 2023-02-26 02:46:43 +00:00
6e8d951360 Increased the accessible memory and got the Mandelbrot renderer working under the brainfuck compiler! 2023-02-24 17:38:23 +00:00
6ea34a3525 Added MOV Immidiate to REG/MEM 2023-02-24 15:25:45 +00:00
5af6d720c3 Fixed ADD again and some memory read logic. Compiler runs the default brainfuck message program!! 2023-02-24 14:10:07 +00:00
3e484a0ceb Added register indirect unconditional jump 2023-02-24 13:04:32 +00:00
9ed3dc3312 Fixed bug introduced in a previous commit about fixing ADD 2023-02-24 12:48:03 +00:00
96b7a4d298 Added the SUB instruction (piggybacking off of ADD) AND THE COMPILER FINISHES GENERATING CODE!! 2023-02-24 12:47:32 +00:00
808827cbdd Fixed arg bug in ADD 2023-02-24 11:54:13 +00:00
355c673a37 Added a POP instruction 2023-02-24 11:31:15 +00:00
c3580848de Added bitwise TEST instruction 2023-02-24 10:08:01 +00:00
abee49d6c3 Implemented PUSH instruction, fixed register addressing bug and a RET bug 2023-02-24 07:32:27 +00:00
a189da249c Added STOS instruction. Native brainfuck compiler started generating code! 2023-02-24 05:01:55 +00:00
e684db8348 Added support to CMP for compare memory to opcode parameter, added support for both PROC_DE_LOAD_?_PARAM and PROC_MEMIO_READ at the same command and associated changes 2023-02-24 02:18:48 +00:00
c4ac55d4c3 Implemented the RET instruction,fixed CALL bug, clarified MOD naming and usage 2023-02-23 14:48:48 +00:00
7fde422341 Added Microcode support, Stack, implemented the CALL instruction in microcode and grouped the wires on the decoder module 2023-02-22 01:28:23 +00:00
e2e9a92832 Cleaned the decoder a bit and laid down some of the groundwork for microcode 2023-02-19 16:22:23 +00:00
e6c9c722e3 Run the project through aspell and tweaked the README 2023-02-19 00:52:52 +00:00
fd4a9b5442 Fixed register addressing bug, mem read endianness, cleaned up code and added a provisional project logo 2023-02-19 00:20:53 +00:00
82bd859874 Moved the decoding of opcodes into a separate module and optimised memory reads 2023-02-17 18:08:09 +00:00