fde181aa66
Project: Fixed verilator warnings for fpga_sim
2024-02-26 13:12:26 +00:00
c527a053a6
Peripherals/ascii_to_HD44780_driver: Added support for the \e[H and \e[2J escape codes to clear the screen after the i2c_bootloader is done
2024-02-11 04:35:44 +00:00
aac55f7038
I2C_BOOTLOADER: Added support for error handling
2024-02-10 22:35:33 +00:00
a8c29aff9b
I2C_BOOTLOADER: Several fixes and a 4.5x performance increase as well as the addition of 16bit reads from the I2C_driver
2024-02-10 19:42:18 +00:00
be402aa8f7
Project: updated copyright notices and README and fixed a few spelling mistakes
2024-02-10 15:52:13 +00:00
1966ab78b4
Peripherals/I2C: Added a CPU I2C driver and wrote a bootloader that uses that to boot from an I2C eeprom
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I'm happy to have reached 200 commits and with this, version v0.3.0 is functionally ready. I still need to do a fair bit of cleanup and bug fixing though before the actual release. With this commit I added a CPU I2C driver as well as a basic arbiter to have the hardware lcd controller and the software i2c communication pass through the same I2C driver and I2C bus. I also wrote a bootloader that reads code from an i2c eeprom to make sure the hardware works.
2024-02-09 23:30:58 +00:00
65dfd21ef0
Peripherals/I2C_driver: Uncommented code to check for device acknowledgment
2023-12-09 00:53:52 +00:00
533f346f9b
Build system: Added the ability to simulate an FPGA SoC and fixed all the warning verilator gave of the code previously used only for synthesis.
2023-12-07 16:39:04 +00:00
2fcc521f12
Peripherals/Wishbone_memory: Rewrote the module to be more efficient, smaller and also support byte level addressing. It is correct enough now to run code out of!
2023-12-05 02:50:21 +00:00
26210be950
Peripherals/I2C_driver: Corrected the implementation of the bidirectional SDA pin, fixing the final yosys 0.35 warning
2023-12-04 22:40:53 +00:00
63ea29e399
Peripherals/Memory: Added support for the litedram DDR memory controller, created a new memory map and updated all relevant code and files including the addition of rudimentary wait state support for the cpu (BIU)
2023-12-03 19:24:39 +00:00
aedefddb5d
Project: The cpu finally works perfectly now even at full speed as far as i can tell! I made the ram and register writes synchronous which fixed the weird issues I had, then I added -abc9 to yosys so that nextpnr can actually route the cpu at full speed and increased the display fifo since the cpu is so fast now!!
2023-11-15 18:43:56 +00:00
29bc2e6d96
Project: Cleaned up some code and run the project through aspell
2023-11-15 14:37:46 +00:00
09ccce5f30
Peripherals/HD44780: Rewrote and cleaned up a lot of the driver code. Unfortunately what i think is a very weird bug in yosys is still affecting the codebase
2023-11-15 00:26:46 +00:00
2c8e8a9d9c
Added simple support for \n and \r on the HD44780 driver, increased the synthesised mem to fit brainfuck_compiled.asm and made it the default.
2023-11-12 21:39:27 +00:00
189b037bdf
Added proper line wrapping for HD44780 LCDs and rewrote half the driver to make it more flexible
2023-11-12 17:30:52 +00:00
a88c420ca5
Added an I2C driver, a PCF8574 driver and an HD44780 display driver. Unfortunately this shows that even fibonacci doesn't run correctly. Nonetheless, I made colored_led.asm output text to the display!
2023-11-09 22:10:55 +00:00
