(Tim) Efthimis Kritikos 9de83fd7c1 Added partial support for the software interrupt INT instruction		2023-03-08 07:26:28 +00:00
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alu_header.v	Added partial support for the software interrupt INT instruction	2023-03-08 07:26:28 +00:00
alu.v	Added partial support for the software interrupt INT instruction	2023-03-08 07:26:28 +00:00
boot_code.asm	Added partial support for the software interrupt INT instruction	2023-03-08 07:26:28 +00:00
config.v	Improved build system and project directory structure	2023-02-16 01:52:02 +00:00
decoder.v	Added partial support for the software interrupt INT instruction	2023-03-08 07:26:28 +00:00
general.v	Fixed register addressing bug, mem read endianness, cleaned up code and added a provisional project logo	2023-02-19 00:20:53 +00:00
Makefile	Improved build system's handling of verilator	2023-03-05 23:11:18 +00:00
memory.v	Added support for Verilator!	2023-03-04 08:37:43 +00:00
proc_state_def.v	Fixed most problems verilator's linter found	2023-03-04 06:22:28 +00:00
processor.v	Added partial support for the software interrupt INT instruction	2023-03-08 07:26:28 +00:00
registers.v	Fixed most problems verilator's linter found	2023-03-04 06:22:28 +00:00
system.v	Added partial support for the software interrupt INT instruction	2023-03-08 07:26:28 +00:00
testbench.cpp	Wrote a more complete testbench for verilator, switched from lx2 to fst and fixed cpu clock frequency calculation	2023-03-05 00:10:55 +00:00
testbench.v	Wrote a more complete testbench for verilator, switched from lx2 to fst and fixed cpu clock frequency calculation	2023-03-05 00:10:55 +00:00
ucode_header.v	Added partial support for the software interrupt INT instruction	2023-03-08 07:26:28 +00:00
ucode.txt	Added partial support for the software interrupt INT instruction	2023-03-08 07:26:28 +00:00
verilator_makefile	Improved build system's handling of verilator	2023-03-05 23:11:18 +00:00