Commit Graph

21 Commits

Author SHA1 Message Date
694f708a32 Fixed some relatively low hanging fruit 2023-11-04 08:08:22 +00:00
43f3e16ca4 Removed all instances of inout since from what i understand it's mostly synthesisable 2023-11-02 21:48:12 +00:00
557d160be6 did some cleanup relating to the generation of the VALID_INSTRUCTION signal 2023-11-01 05:00:09 +00:00
49335a2c2f Fixed a small bug in log generation and did some cleanup 2023-10-31 19:01:34 +00:00
d151435ac1 Removed redundant checks for enabled early instruction detection in BIU 2023-10-23 02:30:25 +01:00
ced03c48d6 Added cache flush after write, potentially fixing support for self modifying code 2023-10-23 02:09:13 +01:00
8d3b54b812 Small change from when I last worked on this and an update to the versions on the README 2023-10-21 18:38:50 +01:00
42c319d55d Lots of cleanup mainly on processor.v 2023-06-01 02:13:55 +01:00
1b510e4781 Made the size of the cache variable 2023-05-18 11:21:27 +01:00
53e9d371d7 Fully optimised BIU. Now it can instantly deliver instructions back to back 2023-05-16 18:07:28 +01:00
bfa576e2a0 Cleaned up the interface between BIU and the processor 2023-05-16 13:33:08 +01:00
07d2a80b2e Added code to record statistics and a tool to plot them 2023-05-14 16:06:33 +01:00
00aa828ddc Improved parallelism 2023-05-13 10:52:44 +01:00
fe0426a77b Made execute unit run in parallel with everything else. Still not parallel for most of the time though 2023-05-13 06:51:35 +01:00
7151d5634f Fixed bug that prevented Icarus Verilog from simulating correctly 2023-05-11 19:55:47 +01:00
539fb8416b Fixed copyright notices, did some major cleanup and bumped README's versions 2023-05-11 16:28:10 +01:00
7724e5f383 Removed deprecated BIU_NEXT_POSITION 2023-05-10 08:53:29 +01:00
7e612bb701 made BIU snoop into the processor to deliver new instructions faster and fixed some bugs 2023-05-10 08:31:14 +01:00
c854818d6d Tightened up write timing 2023-05-10 04:43:09 +01:00
b7bfbd4e33 Improved BIU performance and debug messages 2023-05-10 04:05:56 +01:00
da51dd6da7 First draft of a bus interface unit in an effort to make the CPU pipelined. Currently supports code prefetching 2023-05-07 13:34:15 +01:00