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0901af23db
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Added support for some register indirect addressing modes. Also added documentation comments and did some general cleanup
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2023-02-11 20:27:28 +00:00 |
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39f55aa6c3
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Added unaligned access for instructions and data and fixed register file access
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2023-02-10 12:02:20 +00:00 |
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a5571fda12
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Added a very basic execution stage, registers and a very crude adder for ALU. It finally executes instructions!
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2023-02-09 20:17:15 +00:00 |
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c3a2f5eb01
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Added primitive decode stage, improved state handling and fixed CIR register
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2023-02-09 14:46:21 +00:00 |
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