13 lines
278 B
Verilog
13 lines
278 B
Verilog
`define PROC_HALT_STATE 4'b0000
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/*INSTRUCTION FETCH STATE*/
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`define PROC_IF_STATE_ENTRY 4'b0001
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`define PROC_IF_WRITE_CIR 4'b0010
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/*DECODE SATE*/
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`define PROC_DE_STATE_ENTRY 4'b0100
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`define PROC_DE_LOAD_16_PARAM 4'b0101
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/*EXECUTE STATE*/
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`define PROC_EX_STATE_ENTRY 4'b1000
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