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(Tim) Efthimis Kritikos
Efthimis
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https://efthimiskritikos.com/
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2023-02-04
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Efthimis
pushed to
v0.1.x
at
Efthimis/9086
2023-05-23 09:28:17 +00:00
98e73af5da
Fixed clock cycle counter overflow, reset circuitry for icarus verilog and implemented statistics recording
Efthimis
pushed to
master
at
Efthimis/9086
2023-05-23 08:25:55 +00:00
0bf00df07c
Fixed clock cycle and instruction counter overflow
35a5a9ada2
Added more data to a test program
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Efthimis
pushed to
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Efthimis/9086
2023-05-21 01:59:43 +00:00
6c146098ee
Removed useless code from cache_fill_and_empty.asm
e74d73ed58
Added reporting of branches on the stat json files and improved the plotting script
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Efthimis
pushed to
master
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Efthimis/9086
2023-05-21 00:47:12 +00:00
3dd2ff59ea
Added 2 more test programs, 2 new instructions and fixed a bug in CMP
Efthimis
pushed to
master
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Efthimis/9086
2023-05-19 16:57:51 +00:00
021dd06e9a
Added support for some more instructions, fixed a bug in CMP and also added a program that uses them
Efthimis
pushed to
master
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Efthimis/9086
2023-05-18 19:15:03 +00:00
64f5da82b0
Improved cache utilisation plotting tool
1b510e4781
Made the size of the cache variable
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Efthimis
pushed to
master
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Efthimis/9086
2023-05-17 20:30:17 +00:00
7db70d79ff
Made execute unit start at a state transition of a signal from the decoder thus allowing for an IPC of 0.99 !!
Efthimis
pushed to
master
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Efthimis/9086
2023-05-17 19:08:34 +00:00
90f63b525d
Made the decode unit able to continuously decode (simple) instructions if BIU allows it
Efthimis
pushed to
master
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Efthimis/9086
2023-05-17 10:03:48 +00:00
30c3deca37
Made the execute unit signal the end of execution by a state change rather than the state of a signal to allow for one cycle instructions
Efthimis
pushed to
master
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Efthimis/9086
2023-05-16 17:06:10 +00:00
53e9d371d7
Fully optimised BIU. Now it can instantly deliver instructions back to back
Efthimis
pushed to
master
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Efthimis/9086
2023-05-16 15:30:15 +00:00
f914d1ec8f
Cleaned up processor.v a bit
Efthimis
pushed to
master
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Efthimis/9086
2023-05-16 13:04:32 +00:00
aca3357cda
Fixed README formatting error
Efthimis
pushed to
master
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Efthimis/Testing
2023-05-16 13:03:23 +00:00
95dc7a8d27
aaa
Efthimis
pushed to
master
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Efthimis/Testing
2023-05-16 13:02:33 +00:00
cd81f846a9
test main readme
Efthimis
pushed to
master
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Efthimis/9086
2023-05-16 12:57:56 +00:00
97912b1a29
Fixed bug found by icarus verilog and added outdated notice to README
Efthimis
pushed to
master
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Efthimis/9086
2023-05-16 12:31:40 +00:00
bfa576e2a0
Cleaned up the interface between BIU and the processor
Efthimis
pushed to
master
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Efthimis/9086
2023-05-14 15:05:00 +00:00
07d2a80b2e
Added code to record statistics and a tool to plot them
Efthimis
pushed to
master
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Efthimis/9086
2023-05-13 12:43:46 +00:00
df342467c7
Saved a clock cycle from microcode starts and added info in decode to allow saving a cycle on almost every instruction
Efthimis
pushed to
master
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Efthimis/9086
2023-05-13 10:00:01 +00:00
00aa828ddc
Improved parallelism
Efthimis
pushed to
master
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Efthimis/9086
2023-05-13 05:53:38 +00:00
fe0426a77b
Made execute unit run in parallel with everything else. Still not parallel for most of the time though
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