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(Tim) Efthimis Kritikos 2023-11-07 13:50:18 +00:00
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@ -20,8 +20,9 @@ A CPU that aims to be binary compatible with the 8086 ISA, focused on optimisati
<img width="700" style=" margin: 10px 0px 10px 10px;" alt="9086 logo" src="readme_files/9086_overview.svg"> <img width="700" style=" margin: 10px 0px 10px 10px;" alt="9086 logo" src="readme_files/9086_overview.svg">
### Simulating it ### Simulating it
Both Verilator and Icarus Verilog can be used for simulation. You can select which one you want with the SIM variable on [./common.mk](./common.mk) Both Verilator and Icarus Verilog can be used for simulation. You can select which one you want with the SIM variable on [./common.mk](./common.mk).
Specifically this list shows the software needed and the versions used during development (other versions should work as well)
This list shows the software needed and the versions used during development
* Icarus Verilog : version 12.0 OR **(preferred)** Verilator : 5.016 * Icarus Verilog : version 12.0 OR **(preferred)** Verilator : 5.016
* bin86 : 0.16.21 * bin86 : 0.16.21