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external_ip
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Added .keep file for intentionally empty directory
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2023-12-03 19:30:59 +00:00 |
fpga_config/OrangeCrab_r0.2.1
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Project: updated copyright notices and README and fixed a few spelling mistakes
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2024-02-10 15:52:13 +00:00 |
peripherals
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I2C_BOOTLOADER: Several fixes and a 4.5x performance increase as well as the addition of 16bit reads from the I2C_driver
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2024-02-10 19:42:18 +00:00 |
alu_header.v
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Project: updated copyright notices and README and fixed a few spelling mistakes
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2024-02-10 15:52:13 +00:00 |
alu.v
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Project: updated copyright notices and README and fixed a few spelling mistakes
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2024-02-10 15:52:13 +00:00 |
biu.v
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Project: updated copyright notices and README and fixed a few spelling mistakes
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2024-02-10 15:52:13 +00:00 |
boot_code.asm
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Peripherals/Memory: Added support for the litedram DDR memory controller, created a new memory map and updated all relevant code and files including the addition of rudimentary wait state support for the cpu (BIU)
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2023-12-03 19:24:39 +00:00 |
config.v
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Project: updated copyright notices and README and fixed a few spelling mistakes
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2024-02-10 15:52:13 +00:00 |
decoder.v
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Project: updated copyright notices and README and fixed a few spelling mistakes
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2024-02-10 15:52:13 +00:00 |
error_header.v
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First draft of a bus interface unit in an effort to make the CPU pipelined. Currently supports code prefetching
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2023-05-07 13:34:15 +01:00 |
exec_state_def.v
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Project: updated copyright notices and README and fixed a few spelling mistakes
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2024-02-10 15:52:13 +00:00 |
execute.v
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Project: updated copyright notices and README and fixed a few spelling mistakes
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2024-02-10 15:52:13 +00:00 |
general.v
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Project: updated copyright notices and README and fixed a few spelling mistakes
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2024-02-10 15:52:13 +00:00 |
Makefile
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Project: updated copyright notices and README and fixed a few spelling mistakes
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2024-02-10 15:52:13 +00:00 |
memory.v
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Project: updated copyright notices and README and fixed a few spelling mistakes
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2024-02-10 15:52:13 +00:00 |
processor.v
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Project: updated copyright notices and README and fixed a few spelling mistakes
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2024-02-10 15:52:13 +00:00 |
registers.v
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Project: updated copyright notices and README and fixed a few spelling mistakes
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2024-02-10 15:52:13 +00:00 |
system.v
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Project: updated copyright notices and README and fixed a few spelling mistakes
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2024-02-10 15:52:13 +00:00 |
testbench.cpp
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Fixed a lot of "conflicting driver" issues but I had to roll back an optimisation
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2023-11-04 11:04:22 +00:00 |
testbench.v
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Project: updated copyright notices and README and fixed a few spelling mistakes
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2024-02-10 15:52:13 +00:00 |
ucode_header.v
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Project: updated copyright notices and README and fixed a few spelling mistakes
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2024-02-10 15:52:13 +00:00 |
ucode.txt
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Project: updated copyright notices and README and fixed a few spelling mistakes
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2024-02-10 15:52:13 +00:00 |
verilator_makefile
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Removed erroneous file and run aspell
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2023-03-21 14:51:39 +00:00 |
verilator_makefile_fpga
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Build system: Small fixes and corrected rebuild when only the verilator testbench was changed
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2023-12-09 02:39:14 +00:00 |