| .. |
|
fpga_config/OrangeCrab_r0.2.1
|
Fixed a bunch of things wrong with fpga_top.v and gated off some more simulation-only code
|
2023-11-02 23:46:12 +00:00 |
|
alu_header.v
|
Added partial support for the software interrupt INT instruction
|
2023-03-08 07:26:28 +00:00 |
|
alu.v
|
Added the OUT instruction to be able to properly address I/O and moved printing logic to a device on the I/O space. Also added IRET which is basically just a RET in this case
|
2023-03-09 06:03:13 +00:00 |
|
biu.v
|
Fixed some relatively low hanging fruit
|
2023-11-04 08:08:22 +00:00 |
|
boot_code.asm
|
Improved DOS char print code
|
2023-03-14 07:20:30 +00:00 |
|
config.v
|
Removed some code that wasn't meant for synthesis and fixed important bug in Makefile
|
2023-11-02 22:19:15 +00:00 |
|
decoder.v
|
Fixed some relatively low hanging fruit
|
2023-11-04 08:08:22 +00:00 |
|
error_header.v
|
First draft of a bus interface unit in an effort to make the CPU pipelined. Currently supports code prefetching
|
2023-05-07 13:34:15 +01:00 |
|
exec_state_def.v
|
General cleanup and moved the reading of instruction parameters from a separate stage in execute to circuitry during the decode
|
2023-05-29 02:29:15 +01:00 |
|
execute.v
|
Removed all instances of inout since from what i understand it's mostly synthesisable
|
2023-11-02 21:48:12 +00:00 |
|
general.v
|
Cleaned up some pieces of code and fixed a bug
|
2023-05-04 00:49:04 +01:00 |
|
Makefile
|
Removed some code that wasn't meant for synthesis and fixed important bug in Makefile
|
2023-11-02 22:19:15 +00:00 |
|
memory.v
|
Removed all instances of inout since from what i understand it's mostly synthesisable
|
2023-11-02 21:48:12 +00:00 |
|
processor.v
|
Removed all instances of inout since from what i understand it's mostly synthesisable
|
2023-11-02 21:48:12 +00:00 |
|
registers.v
|
Improved BIU performance and debug messages
|
2023-05-10 04:05:56 +01:00 |
|
system.v
|
Fixed a bunch of things wrong with fpga_top.v and gated off some more simulation-only code
|
2023-11-02 23:46:12 +00:00 |
|
testbench.cpp
|
Cleaned up some pieces of code and fixed a bug
|
2023-05-04 00:49:04 +01:00 |
|
testbench.v
|
Removed all instances of inout since from what i understand it's mostly synthesisable
|
2023-11-02 21:48:12 +00:00 |
|
ucode_header.v
|
Added partial support for the software interrupt INT instruction
|
2023-03-08 07:26:28 +00:00 |
|
ucode.txt
|
Changed slogan and cleaned up some small pieces of code
|
2023-05-23 16:18:33 +01:00 |
|
verilator_makefile
|
Removed erroneous file and run aspell
|
2023-03-21 14:51:39 +00:00 |
