16 lines
673 B
Markdown
16 lines
673 B
Markdown
The OrangeCrab r0.2.1 has been configured with an I2C bus controller and LiteDRAM for the DDR3 memory that is on-board.
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This is a block diagram of the system:
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<img width="700" style=" margin: 10px 0px 10px 10px;" alt="9086 logo" src="readme_files/readme_files/overview_diagram.svg">
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and inside the FPGA:
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<img width="700" style=" margin: 10px 0px 10px 10px;" alt="9086 logo" src="readme_files/system_diagram.svg">
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and this is the hardware setup during development:
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<img width="700" style=" margin: 10px 0px 10px 10px;" alt="9086 logo" src="readme_files/readme_files/readme_files/picture.png">
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You can find some configuration options in the [./config.mk](./config.mk)
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