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README.md
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README.md
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# 9086
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An binary compatible 8086 CPU with as many optimizations as possible
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A CPU that aims to be binary compatible with the 8086 and with as many optimisations as possible
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### Progress
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* [X] Executing code
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* [ ] can calculate the sieve of Eratosthenes
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* [ ] can boot up MS-DOS / FreeDOS
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* [ ] Is completely binary compatible
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* [ ] Is pipelined
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* [ ] Is Out of Order
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* [ ] Is superscalar
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### Building it
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To build it you need Icarus Verilog, bin86, GNU make, xxd and the posix coreutils.
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Go into the cpu directory and run `make`
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At the time of development the versions used are :
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* Icarus Verilog version 11.0 (stable)
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* bin86 version: 0.16.17
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* GNU Make 4.3
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* xxd 2022-01-14
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* GNU coreutils 8.32
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cpu/Makefile
17
cpu/Makefile
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vvp ${VVP} -lxt2
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gtkwave test.lx2 gtkwave_savefile.gtkw
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${VVP} : ${SOURCES} ${INCLUDES}
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${VVP} : ${SOURCES} ${INCLUDES} boot_code.txt
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iverilog -g2012 ${SOURCES} -o $@
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.PHONY: clean
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clean:
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rm -f ${VVP} test.lx2
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rm -f ${VVP} test.lx2 boot_code.txt boot_code.bin
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boot_code.txt:boot_code.bin
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dd if=/dev/zero bs=1 count=256 of=boot_code.stage status=none
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dd if=boot_code.bin of=boot_code.stage conv=notrunc,nocreat status=none
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xxd -ps -c 2 boot_code.stage > boot_code.txt
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rm boot_code.stage
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boot_code.bin:boot_code.asm
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as86 -0 $< -b $@
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.PHONY: dumpas
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dumpas: boot_code.bin
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objdump -D -b binary -m i8086 boot_code.bin
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module rom(input [19:0] address,output wire [15:0] data ,input rd,input cs);
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reg [15:0] memory [0:15];
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reg [15:0] memory [0:127];
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initial begin
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$readmemh("boot_code.txt", memory);
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end
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