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3e66336456
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Build system: Small fixes and corrected rebuild when only the verilator testbench was changed
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2023-12-09 02:39:14 +00:00 |
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533f346f9b
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Build system: Added the ability to simulate an FPGA SoC and fixed all the warning verilator gave of the code previously used only for synthesis.
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2023-12-07 16:39:04 +00:00 |
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05343864da
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Build system: Added a script that uses docker to test building the project on some popular linux distros
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2023-12-06 01:22:07 +00:00 |
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dd1080b42c
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Build system: Added maximum CPU frequency to build system info and improved the way nextpnr seed is handled, fixing builds with older versions of make
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2023-12-05 01:13:43 +00:00 |
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0eecfdcf40
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Tools/Gen_litedram: Major improvements and cleanup including work in ensuring it is reproducible
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2023-12-04 21:36:48 +00:00 |
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63ea29e399
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Peripherals/Memory: Added support for the litedram DDR memory controller, created a new memory map and updated all relevant code and files including the addition of rudimentary wait state support for the cpu (BIU)
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2023-12-03 19:24:39 +00:00 |
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29bc2e6d96
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Project: Cleaned up some code and run the project through aspell
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2023-11-15 14:37:46 +00:00 |
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09b3d51015
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Added statistics to place&route
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2023-11-09 23:10:06 +00:00 |
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8a62b89a13
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Fixed small bug with json data reporting and improved slightly the graphs
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2023-10-30 08:01:03 +00:00 |
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e74d73ed58
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Added reporting of branches on the stat json files and improved the plotting script
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2023-05-21 03:00:27 +01:00 |
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64f5da82b0
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Improved cache utilisation plotting tool
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2023-05-18 20:16:31 +01:00 |
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07d2a80b2e
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Added code to record statistics and a tool to plot them
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2023-05-14 16:06:33 +01:00 |
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