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Changed slogan and cleaned up some small pieces of code

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This commit is contained in:
(Tim) Efthimis Kritikos 2023-05-23 16:18:33 +01:00
parent 0bf00df07c
commit 79d598fc64
7 changed files with 13 additions and 13 deletions
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2
README.md
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@ -1,7 +1,7 @@
<img width="186" height="70" style=" margin: 10px 0px 10px 10px;" alt="9086 logo" src="readme_files/9086_design1.svg">
A CPU that aims to be binary compatible with the 8086 and with as many optimisations as possible
A CPU that aims to be binary compatible with the 8086 ISA, focused on optimisation and flexibility.
### Progress

6
system/decoder.v
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@ -532,7 +532,7 @@ always @( FLAGS or CIR or SIMPLE_MICRO or seq_addr_input ) begin
DEPENDS_ON_PREVIOUS<=0;
end
11'b1111_011?_000:begin
/* TEST - Bitwise AND of immediate and registers/memmory affecting only flags */
/* TEST - Bitwise AND of immediate and registers/memory affecting only flags */
/* 1 1 1 1 0 1 1 W | MOD 0 0 0 R/M | < DISP-LO > | < DISP-HI > | DATA | DATA if W */
opcode_size=1;
Wbit=CIR[8:8];
@ -640,7 +640,7 @@ always @( FLAGS or CIR or SIMPLE_MICRO or seq_addr_input ) begin
memio_address_select=0;
end
11'b1100_1101_???:begin
/* INT - execute interrupt handler */
/* INT - Execute interrupt handler */
/* 1 1 0 0 1 1 0 1 | DATA |*/
// [skipped] 1) push flags
// [skipped] 2) clear trap and interrupt enable flag
@ -658,7 +658,7 @@ always @( FLAGS or CIR or SIMPLE_MICRO or seq_addr_input ) begin
memio_address_select=0;
end
11'b1110_011?_???:begin
/* OUT - write AL or AX to a defined output port */
/* OUT - Write AL or AX to a defined output port */
/* | 1 1 1 0 0 1 1 W | DATA 8 | */
memio_address_select=1;
Wbit=CIR[8:8];

2
system/execute.v
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@ -25,7 +25,7 @@ module execute_unit (
/* STATE CONTROL */ ,output [`EXEC_STATE_BITS-1:0] _exec_state_, input [`EXEC_STATE_BITS-1:0] init_state
/* ALU CONTROL */ ,input [1:0] in_alu_sel1, input [1:0] in_alu_sel2, input [`ALU_OP_BITS-1:0] ALU_OP, output [15:0] _ALU_O_
/* REGISTER DATA */ ,input [15:0] reg_read_port1_data ,input [15:0] reg_read_port2_data, output reg [3:0] reg_read_port1_addr, output reg use_exec_reg_addr, output reg reg_write_we
/* FLAFS */ ,output reg [7:0] FLAGS
/* FLAGS */ ,output reg [7:0] FLAGS
/* BIU */ ,output reg [15:0] BIU_ADDRESS_INPUT,output reg biu_write_request, output reg biu_read_request, input BIU_VALID_DATA, input [15:0] BIU_DATA, output reg biu_data_direction, output reg biu_jump_req
);

2
system/processor.v
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@ -93,7 +93,7 @@ execute_unit execute_unit (
/* STATE CONTROL */ ,exec_state, next_state
/* ALU CONTROL */ ,in_alu_sel1, in_alu_sel2, ALU_OP, ALU_O
/* REGISTER DATA */ ,reg_read_port1_data, reg_read_port2_data, EXEC_reg_read_port1_addr, use_exec_reg_addr, reg_write_we
/* FLAFS */ ,EXEC_FLAGS
/* FLAGS */ ,EXEC_FLAGS
/* BIU */ ,BIU_ADDRESS_INPUT, biu_write_request, biu_read_request, BIU_VALID_DATA, BIU_DATA, biu_data_direction, biu_jump_req
);