Added support for Verilator!
This commit is contained in:
parent
ba52ff89e6
commit
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5
.gitignore
vendored
5
.gitignore
vendored
@ -6,11 +6,12 @@
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*.swp
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*.memdump
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*.lxt # Not sure when those crop up
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boot_code/brainfuck.bin
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boot_code/brainfuck.txt
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boot_code/brainfuck_interpreted.bin
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boot_code/brainfuck_interpreted.txt
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boot_code/brainfuck_mandelbrot.bin
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boot_code/brainfuck_mandelbrot.txt
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boot_code/brainfuck_compiled.bin
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boot_code/brainfuck_compiled.txt
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system/boot_code.bin
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system/boot_code.txt
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system/obj_dir/
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5
Makefile
5
Makefile
@ -17,6 +17,7 @@
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#
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SYSTEM_VVP=system/system.vvp
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VERILATOR_BIN=system/obj_dir/Vsystem
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BOOT_CODE=boot_code/brainfuck_mandelbrot.txt
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GTKWSAVE=./gtkwave_savefile.gtkw
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MICROCODE=system/ucode.txt
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@ -38,6 +39,10 @@ boot_code/%.txt:
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${SYSTEM_VVP}:
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${Q}make ${MAKEOPTS} -C system system.vvp
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.PHONY:${VERILATOR_BIN}
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${VERILATOR_BIN}:
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${Q}make ${MAKEOPTS} -C system obj_dir/Vsystem
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.PHONY: clean
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clean:
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${Q}make ${MAKEOPTS} -C system clean
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35
common.mk
35
common.mk
@ -1,11 +1,22 @@
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.PRECIOUS:${BOOT_CODE}
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QUIET=1
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# QUIET: 1=clean, non-verbose output
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# 2=normal make output
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SIM=VERILATOR
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#SIM=ICARUS
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# SIM: VERILATOR: use Verilator
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# ICARUS: use Icarus Verilog
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ifeq "${QUIET}" "1"
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QUIET_AS = @echo ' AS '$@;
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QUIET_VVP = @echo ' VVP '$@;
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QUIET_IVERILOG = @echo ' IVERILOG '$@;
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QUIET_CLEAN = @printf ' CLEAN %s\n' $1;
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QUIET_AS = @echo ' AS '$@;
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QUIET_VVP = @echo ' VVP '$@;
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QUIET_IVERILOG = @echo ' IVERILOG '$@;
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QUIET_VERILATOR = @echo ' VERILATOR '$@;
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QUIET_CLEAN = @printf ' CLEAN %s\n' $1;
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QUIET_VERILATOR_RUN = @printf ' %s %s\n' $1 $2;
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Q = @
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MAKEOPTS=--no-print-directory
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.SILENT:
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@ -34,15 +45,27 @@ ifeq "${NO_ASM}" "0"
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endif
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# Running simulation
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%.lx2 %.memdump: %.txt ${SYSTEM_VVP}
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ifeq "${SIM}" "ICARUS"
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%.lx2 %.memdump: %.txt ${SYSTEM_VVP} ${MICROCODE}
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${QUIET_VVP}
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${Q}vvp "${SYSTEM_VVP}" -lxt2 +BOOT_CODE="$<" +WAVEFORM="$(subst .txt,.lx2,$<)" +MEMDUMP="$(subst .txt,.memdumptxt,$<)" +MICROCODE="${MICROCODE}"
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${Q}grep -v '^//' "$(subst .txt,.memdumptxt,$<)" | xxd -ps -c 2 -r > "$(subst .txt,.memdump,$<)"
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${Q}rm "$(subst .txt,.memdumptxt,$<)"
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%.run: %.txt ${SYSTEM_VVP}
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%.run: %.txt ${SYSTEM_VVP} ${MICROCODE}
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${QUIET_VVP}
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${Q}vvp -i "${SYSTEM_VVP}" +BOOT_CODE="$<" +MICROCODE="${MICROCODE}"
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else ifeq "${SIM}" "VERILATOR"
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%.lx2 %.memdump: %.txt ${VERILATOR_BIN} ${MICROCODE}
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$(call QUIET_VERILATOR_RUN,$(word 2,$^),$<)
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${Q}"${VERILATOR_BIN}" +BOOT_CODE="$<" +WAVEFORM="$(subst .txt,.lx2,$<)" +MEMDUMP="$(subst .txt,.memdumptxt,$<)" +MICROCODE="${MICROCODE}"
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${Q}grep -v '^//' "$(subst .txt,.memdumptxt,$<)" | xxd -ps -c 2 -r > "$(subst .txt,.memdump,$<)"
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${Q}rm "$(subst .txt,.memdumptxt,$<)"
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%.run: %.txt ${VERILATOR_BIN} ${MICROCODE}
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$(call QUIET_VERILATOR_RUN,$(word 2,$^),$<)
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${Q}numactl -m 0 -C 17,18 -- "${VERILATOR_BIN}" +BOOT_CODE="$<" +MICROCODE="${MICROCODE}"
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endif
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%.disas: %.bin
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objdump -D -b binary -m i8086 $^ | less
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@ -15,9 +15,13 @@
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <http://www.gnu.org/licenses/>.
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#
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SOURCES=processor.v testbench.v memory.v registers.v alu.v decoder.v general.v
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INCLUDES=proc_state_def.v alu_header.v config.v ucode_header.v ${MICROCODE}
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TOP_LEVEL_SOURCE=system.v
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SOURCES=processor.v memory.v registers.v alu.v decoder.v general.v
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EVENT_SIM_TESTBENCH=testbench.v
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VERILATOR_TESTBENCH=testbench.cpp
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INCLUDES=proc_state_def.v alu_header.v config.v ucode_header.v
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SYSTEM_VVP=system.vvp
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VERILATOR_BIN=obj_dir/Vsystem
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BOOT_CODE=boot_code.txt
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GTKWSAVE=../gtkwave_savefile.gtkw
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MICROCODE=ucode.txt
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@ -26,12 +30,15 @@ NO_ASM=0
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include ../common.mk
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# COMPILING
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${SYSTEM_VVP} : ${SOURCES} ${INCLUDES}
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${SYSTEM_VVP} : ${TOP_LEVEL_SOURCE} ${SOURCES} ${INCLUDES} ${EVENT_SIM_TESTBENCH}
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${QUIET_IVERILOG}
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${Q}iverilog -g2012 -o "$@" ${SOURCES}
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${Q}iverilog -g2012 -o "$@" ${TOP_LEVEL_SOURCE} ${SOURCES} ${EVENT_SIM_TESTBENCH}
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${VERILATOR_BIN}: ${VERILATOR_TESTBENCH} ${TOP_LEVEL_SOURCE} ${SOURCES} ${INCLUDES}
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${QUIET_VERILATOR}
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${Q}verilator --cc --exe --build -j 0 $^ -Wall --Wno-DECLFILENAME -Wno-SYNCASYNCNET -Wno-MULTIDRIVEN 2>&1 --threads 1 --autoflush >/dev/null #TODO: remove the silencing and make the generated Makefiles print quietly as well
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.PHONY: clean
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clean:
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$(call QUIET_CLEAN,system)
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${Q}rm -f ${SYSTEM_VVP} *.lx2 boot_code.txt boot_code.bin *memdump *memdumptxt
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${Q}rm -rf ${SYSTEM_VVP} *.lx2 boot_code.txt boot_code.bin *memdump *memdumptxt obj_dir
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@ -17,8 +17,13 @@
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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// don't ask for the full 1MiB especially since we don't even have segmentation
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/* verilator lint_off UNUSEDSIGNAL */
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module doublemem(input [19:0] address,inout wire [15:0] data ,input rd,input wr,input BHE,input cs);
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/* verilator lint_on UNUSEDSIGNAL */
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reg [15:0] memory [0:32768];
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initial begin
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string boot_code;
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if(!$value$plusargs("BOOT_CODE=%s",boot_code))begin
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@ -28,15 +33,15 @@ initial begin
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$readmemh(boot_code, memory,0,16383);
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end
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assign data[7:0] = !address[0:0] & !rd & !cs ? memory[address[15:1]][15:8] : 16'hz;
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assign data[7:0] = !address[0:0] & !rd & !cs ? memory[address[16:1]][15:8] : 8'hz;
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assign data[15:8] = !BHE & !rd & !cs ? memory[address[15:1]][7:0] : 16'hz;
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assign data[15:8] = !BHE & !rd & !cs ? memory[address[16:1]][7:0] : 8'hz;
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always @(negedge wr) begin
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if(BHE==0)
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memory[address[15:1]][7:0]=data[15:8];
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memory[address[16:1]][7:0]<=data[15:8];
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if(address[0]==0)
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memory[address[15:1]][15:8]=data[7:0];
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memory[address[16:1]][15:8]<=data[7:0];
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end
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endmodule
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17
system/system.v
Normal file
17
system/system.v
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@ -0,0 +1,17 @@
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`define CPU_SPEED 1000
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module system ( input clock,input reset, output [19:0]address_bus, inout [15:0]data_bus,output BHE, output rd, output wr, output IOMEM, output HALT, output ERROR);
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processor p(clock,reset,address_bus,data_bus,rd,wr,BHE,IOMEM,HALT,ERROR);
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doublemem sysmem(address_bus,data_bus,rd,wr,BHE,IOMEM);
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string memdump_name;
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always @(posedge HALT) begin
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// $display("Processor halted.\nCycles run for: %d",cycles);
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if($value$plusargs("MEMDUMP=%s",memdump_name))begin
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$writememh(memdump_name, sysmem.memory,0,32767);
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end
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// #(`CPU_SPEED) //Just for the waveform
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$finish;
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end
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endmodule
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33
system/testbench.cpp
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33
system/testbench.cpp
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@ -0,0 +1,33 @@
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#include "Vsystem.h"
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#include "verilated.h"
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#include "stdio.h"
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Vsystem *system_state;
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void tick() {
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system_state->clock = 1;
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system_state->eval();
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system_state->clock = 0;
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system_state->eval();
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//printf("tick() %04x\n",system_state->address_bus);
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//trace->dump(timestamp);
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//timestamp += 500/MHz;
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}
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int main(int argc, char** argv) {
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VerilatedContext* contextp = new VerilatedContext;
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contextp->commandArgs(argc, argv);
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system_state = new Vsystem{contextp};
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system_state->reset=1;
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tick();
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system_state->reset=0;
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tick();
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system_state->reset=1;
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while(!contextp->gotFinish()){
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tick();
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}
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delete system_state;
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delete contextp;
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return 0;
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}
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@ -25,18 +25,25 @@ reg reset;
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reg clk_enable;
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wire [19:0]address_bus;
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wire [15:0]data_bus;
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wire rd,wr,romcs,HALT;
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wire rd,wr,HALT;
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wire ERROR;
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wire IOMEM;
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processor p(clock,reset,address_bus,data_bus,rd,wr,BHE,IOMEM,HALT,ERROR);
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doublemem sysmem(address_bus,data_bus,rd,wr,BHE,IOMEM);
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system system( .clock(clock),
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.reset(reset),
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.address_bus(address_bus),
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.data_bus(data_bus),
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.rd(rd),
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.wr(wr),
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.HALT(HALT),
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.ERROR(ERROR),
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.IOMEM(IOMEM)
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);
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`define CPU_SPEED 1000
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clock_gen #(.FREQ(1000)) u1(clk_enable, clock);
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assign romcs=0;
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integer cycles=0;
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string memdump_name;
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@ -44,7 +51,7 @@ initial begin
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string waveform_name;
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if($value$plusargs("WAVEFORM=%s",waveform_name))begin
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$dumpfile(waveform_name);
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$dumpvars(0,p,u1);
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$dumpvars(0,system);
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end
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clk_enable = 1;
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@ -56,20 +63,12 @@ initial begin
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reset = 1;
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end
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always @(posedge HALT) begin
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$display("Processor halted.\nCycles run for: %d",cycles);
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if($value$plusargs("MEMDUMP=%s",memdump_name))begin
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$writememh(memdump_name, sysmem.memory,0,32767);
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end
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#(`CPU_SPEED) //Just for the waveform
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$finish;
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end
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always @(posedge ERROR) begin
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clk_enable <= 0;
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$display("PROCESSOR RUN INTO AN ERROR.\nCycles run for: %d",cycles);
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if($value$plusargs("MEMDUMP=%s",memdump_name))begin
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$writememh(memdump_name, sysmem.memory,0,32767);
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$writememh(memdump_name, system.sysmem.memory,0,32767);
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end
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#(`CPU_SPEED) //Just for the waveform
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$finish;
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@ -55,31 +55,31 @@
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//
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//Nxt M: Next microcode address
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@000 0000_000_000__00__00_0000__00_000000
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@000 _00_000_0000_000_0000_000_000__00__00_0000__00_000000
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// 36 34 32 28 25 21 18 15 13 11 7 5 0
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// CALL
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// wbo|krs|rr2 |imd|rr1 |a1f|a1o|a12|a11|rwa |nxs|Nxt M |
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@001 _00_000_0000_011_1100_001_011__00__01_1100__01_000010 // ALU_1: SP ALU_2: PARAM2 (2) ALU_OP:SUB ALU_out: SP (also fetch the opcode argument to PARAM1)
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@002 _00_000_0000_011_zzzz_000_110__10__11_zzzz__00_000011 // ALU_1: 0 ALU_2: PC ALU_OP:ADD ALU_out: [SP]
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@003 _00_000_0000_011_zzzz_000_101__10__00_zzzz__00_000000 // ALU_1: PARAM1 (arg) ALU_2: PC ALU_OP:ADD ALU_out: PC
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@002 _00_000_0000_011_xxxx_000_110__10__11_xxxx__00_000011 // ALU_1: 0 ALU_2: PC ALU_OP:ADD ALU_out: [SP]
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@003 _00_000_0000_011_xxxx_000_101__10__00_xxxx__00_000000 // ALU_1: PARAM1 (arg) ALU_2: PC ALU_OP:ADD ALU_out: PC
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// RET
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// wbo|krs|rr2 |imd|rr1 |a1f|a1o|a12|a11|rwa |nxs|Nxt M |
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@004 _00_000_0000_110_zzzz_000_101__00__11_zzzz__11_000101 // ALU_1: 0 ALU_2: PARAM2 ([SP]) ALU_OP:ADD ALU_out: PC (also read [SP] to PARAM2)
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@004 _00_000_0000_110_xxxx_000_101__00__11_xxxx__11_000101 // ALU_1: 0 ALU_2: PARAM2 ([SP]) ALU_OP:ADD ALU_out: PC (also read [SP] to PARAM2)
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@005 _00_000_1100_011_0000_000_011__01__00_1100__00_000000 // ALU_1: PARAM1 (2) ALU_2: SP ALU_OP:ADD ALU_out: SP
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// STOS
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// wbo|krs|rr2 |imd|rr1 |a1f|a1o|a12|a11|rwa |nxs|Nxt M |
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@006 _00_000_1000_011_zzzz_000_000__01__11_zzzz__00_000111 // ALU_1: 0 ALU_2: AX ALU_OP:ADD ALU_out: [DI]
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@007 _11_000_zzzz_011_1111_000_011__00__01_1111__00_000000 // ALU_1: DI ALU_2: PARAM2 (2) ALU_OP:ADD ALU_OUT: DI
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@006 _00_000_1000_011_xxxx_000_000__01__11_xxxx__00_000111 // ALU_1: 0 ALU_2: AX ALU_OP:ADD ALU_out: [DI]
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@007 _11_000_xxxx_011_1111_000_011__00__01_1111__00_000000 // ALU_1: DI ALU_2: PARAM2 (2) ALU_OP:ADD ALU_OUT: DI
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// PUSH
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// wbo|krs|rr2 |imd|rr1 |a1f|a1o|a12|a11|rwa |nxs|Nxt M |
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@008 _00_010_0000_011_1100_001_011__00__01_1100__00_001001 // ALU_1: SP ALU_2: PARAM2 (2) ALU_OP:SUB ALU_out: SP (also fetch the opcode argument to PARAM1)
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@009 _00_010_0000_011_zzzz_000_110__01__11_zzzz__00_000000 // ALU_1: 0 ALU_2: REG ALU_OP:ADD ALU_out: [SP]
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@009 _00_010_0000_011_xxxx_000_110__01__11_xxxx__00_000000 // ALU_1: 0 ALU_2: REG ALU_OP:ADD ALU_out: [SP]
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// POP
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// wbo|krs|rr2 |imd|rr1 |a1f|a1o|a12|a11|rwa |nxs|Nxt M |
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@00a _00_100_0000_110_zzzz_011_011__00__11_zzzz__11_001011 // ALU_1: 0 ALU_2: PARAM2 ([SP]) ALU_OP:ADD ALU_out: REG
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@00a _00_100_0000_110_xxxx_011_011__00__11_xxxx__11_001011 // ALU_1: 0 ALU_2: PARAM2 ([SP]) ALU_OP:ADD ALU_out: REG
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@00b _00_000_1100_011_0000_000_011__01__00_1100__00_000000 // ALU_1: PARAM1 (2) ALU_2: SP ALU_OP:ADD ALU_out: SP
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