9086/system/system.v

18 lines
605 B
Verilog

`define CPU_SPEED 1000
module system ( input clock,input reset, output [19:0]address_bus, inout [15:0]data_bus,output BHE, output rd, output wr, output IOMEM, output HALT, output ERROR);
processor p(clock,reset,address_bus,data_bus,rd,wr,BHE,IOMEM,HALT,ERROR);
doublemem sysmem(address_bus,data_bus,rd,wr,BHE,IOMEM);
string memdump_name;
always @(posedge HALT) begin
// $display("Processor halted.\nCycles run for: %d",cycles);
if($value$plusargs("MEMDUMP=%s",memdump_name))begin
$writememh(memdump_name, sysmem.memory,0,32767);
end
// #(`CPU_SPEED) //Just for the waveform
$finish;
end
endmodule