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Build system: renamed upload to upload_bitstream to allow for an upload_firmware in the future

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(Tim) Efthimis Kritikos 2024-01-22 20:19:14 +00:00
parent 8281c9a21f
commit 1d9be44c5a
3 changed files with 6 additions and 6 deletions
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8
Makefile
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@ -54,9 +54,9 @@ mrproper: clean
${Q}make ${MAKEOPTS} PRINT_PATH_PREFIX=system/ -C system mrproper ${Q}make ${MAKEOPTS} PRINT_PATH_PREFIX=system/ -C system mrproper
${Q}make ${MAKEOPTS} PRINT_PATH_PREFIX=boot_code/ -C boot_code mrproper ${Q}make ${MAKEOPTS} PRINT_PATH_PREFIX=boot_code/ -C boot_code mrproper
.PHONY: upload .PHONY: upload_bitstream
upload: boot_code/bios.stxt upload_bitstream: boot_code/bios.stxt
${Q}make ${MAKEOPTS} PRINT_PATH_PREFIX=system/ -C system upload ${Q}make ${MAKEOPTS} PRINT_PATH_PREFIX=system/ -C system upload_bitstream
.PHONY: fpga_sim .PHONY: fpga_sim
fpga_sim: boot_code/bios.stxt fpga_sim: boot_code/bios.stxt
@ -74,7 +74,7 @@ help:
@echo ' boot_code/[name].disas - assemble and show the disassembly of the binary' @echo ' boot_code/[name].disas - assemble and show the disassembly of the binary'
@echo '' @echo ''
@echo 'Synthesis targets:' @echo 'Synthesis targets:'
@echo ' upload - Build a bitstream for the board selected in' @echo ' upload_bitstream - Build a bitstream for the board selected in'
@echo ' common.mk and upload it if possible' @echo ' common.mk and upload it if possible'
@echo ' fpga_sim - Simulate the SoC that gets build for the configured' @echo ' fpga_sim - Simulate the SoC that gets build for the configured'
@echo ' fpga board' @echo ' fpga board'

2
README.md
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@ -29,7 +29,7 @@ This list shows the software needed and the versions used during development :
After that you can run `make` on the top level directory and it should build everything and start the simulation After that you can run `make` on the top level directory and it should build everything and start the simulation
### Synthesis and bitstream creation for FPGAs ### Synthesis and bitstream creation for FPGAs
You need to set FPGA\_BOARD in [./common.mk](./common.mk) to the name of a directory inside [./system/fpga\_config/](system/fpga_config/). You should also check inside your board directory for config.mk for further board-specific configuration options. Then you can run `make upload` in the top level directory and it should create the bitstream and upload it. You need to set FPGA\_BOARD in [./common.mk](./common.mk) to the name of a directory inside [./system/fpga\_config/](system/fpga_config/). You should also check inside your board directory for config.mk for further board-specific configuration options. Then you can run `make upload_bitstream` in the top level directory and it should create the bitstream and upload it.
These are the currently supported FPGA boards: These are the currently supported FPGA boards:

2
system/fpga_config/OrangeCrab_r0.2.1/config.mk
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@ -26,7 +26,7 @@ FPGA_SOC_SIM_SOURCES=${FPGA_SOC_COMMON_SOURCES} fpga_config/OrangeCrab_r0.2.1/ve
FPGA_BOOTCODE=../boot_code/bios.stxt FPGA_BOOTCODE=../boot_code/bios.stxt
upload: dfu_upload upload_bitstream: dfu_upload
${BUILD_FILES_PREFIX}bitstream_${BUILD_NAME}.bit:${BUILD_FILES_PREFIX}nextpnr-ecp5_${BUILD_NAME}.bit ${BUILD_FILES_PREFIX}bitstream_${BUILD_NAME}.bit:${BUILD_FILES_PREFIX}nextpnr-ecp5_${BUILD_NAME}.bit
${Q}cp "$^" "$@" ${Q}cp "$^" "$@"