51 lines
1.1 KiB
Coq
51 lines
1.1 KiB
Coq
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module hello;
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wire out;
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reg A,B,X;
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multiplexer idk(A,B,X,out);
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initial
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begin
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$display("RSLT\tOUT\tA\tB\tSLCT");
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A=1;B=1;X=1;#50
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if(out==1)
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$display("PASS\t%b\t%b\t%b\t%b",out,A,B,X);
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else
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$display("FAIL\t%b\t%b\t%b\t%b",out,A,B,X);
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A=1;B=0;X=1;#50
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if(out==0)
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$display("PASS\t%b\t%b\t%b\t%b",out,A,B,X);
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else
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$display("FAIL\t%b\t%b\t%b\t%b",out,A,B,X);
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A=0;B=1;X=1;#50
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if(out==1)
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$display("PASS\t%b\t%b\t%b\t%b",out,A,B,X);
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else
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$display("FAIL\t%b\t%b\t%b\t%b",out,A,B,X);
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A=0;B=0;X=1;#50
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if(out==0)
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$display("PASS\t%b\t%b\t%b\t%b",out,A,B,X);
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else
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$display("FAIL\t%b\t%b\t%b\t%b",out,A,B,X);
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A=1;B=1;X=0;#50
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if(out==1)
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$display("PASS\t%b\t%b\t%b\t%b",out,A,B,X);
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else
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$display("FAIL\t%b\t%b\t%b\t%b",out,A,B,X);
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A=1;B=0;X=0;#50
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if(out==1)
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$display("PASS\t%b\t%b\t%b\t%b",out,A,B,X);
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else
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$display("FAIL\t%b\t%b\t%b\t%b",out,A,B,X);
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A=0;B=1;X=0;#50
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if(out==0)
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$display("PASS\t%b\t%b\t%b\t%b",out,A,B,X);
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else
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$display("FAIL\t%b\t%b\t%b\t%b",out,A,B,X);
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A=0;B=0;X=0;#50
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if(out==0)
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$display("PASS\t%b\t%b\t%b\t%b",out,A,B,X);
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else
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$display("FAIL\t%b\t%b\t%b\t%b",out,A,B,X);
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$finish ;
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end
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endmodule
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