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9086/system/fpga_config/OrangeCrab_r0.2.1
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(Tim) Efthimis Kritikos e12646bfa5 Adjusted image size in markdown file
2025-10-26 00:53:41 +01:00
..
readme_files Added documentation for the OrangeCrab r0.2.1 fpga board 2025-10-26 00:42:58 +01:00
config.mk Peripherals/I2C: Added a CPU I2C driver and wrote a bootloader that uses that to boot from an I2C eeprom 2024-02-09 23:30:58 +00:00
fpga_top.v Project: Fixed verilator warnings for fpga_sim 2024-02-26 13:12:26 +00:00
pin_constraint.pcf FPGA_Board/OrangeCrab_r0.2.1: Switched the GPIO 0/1 pins for I2C to the dedicated ones 2023-12-10 04:37:07 +00:00
README.md Adjusted image size in markdown file 2025-10-26 00:53:41 +01:00
testbench.cpp Peripherals/I2C_driver: Uncommented code to check for device acknowledgment 2023-12-09 00:53:52 +00:00
verilator_config.vlt Build system: Added the ability to simulate an FPGA SoC and fixed all the warning verilator gave of the code previously used only for synthesis. 2023-12-07 16:39:04 +00:00

README.md

The OrangeCrab r0.2.1 has been configured with an I2C bus controller and LiteDRAM for the DDR3 memory that is on-board.

This is a block diagram of the system:

overview diagram

and inside the FPGA:

system diagram

and this is the hardware setup during development:

Hardware picture

You can find some configuration options in the ./config.mk