24 lines
704 B
Verilog
24 lines
704 B
Verilog
`define PROC_HALT_STATE 4'b0000
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/*INSTRUCTION FETCH STATE*/
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`define PROC_IF_STATE_ENTRY 4'b0001
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`define PROC_IF_WRITE_CIR 4'b0010
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`define PROC_IF_STATE_EXTRA_FETCH_SET 4'b0011
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`define PROC_IF_STATE_EXTRA_FETCH 4'b1111 /******/
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/*DECODE SATE*/
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`define PROC_DE_STATE_ENTRY 4'b0100
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`define PROC_DE_LOAD_16_PARAM 4'b0101
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`define PROC_DE_LOAD_16_EXTRA_FETCH_SET 4'b0110
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`define PROC_DE_LOAD_16_EXTRA_FETCH 4'b0111
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/*MEM/IO READ*/
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`define RPOC_MEMIO_READ 4'b1100
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`define PROC_MEMIO_SETADDR 4'b1101
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`define PROC_MEMIO_GET_ALIGNED_DATA 4'b1110 /* :) */
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`define PROC_MEMIO_GET_UNALIGNED_DATA 4'b1010 /* :( */
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/*EXECUTE STATE*/
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`define PROC_EX_STATE_ENTRY 4'b1000
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`define PROC_EX_STATE_EXIT 4'b1001
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