123 lines
4.1 KiB
Makefile
123 lines
4.1 KiB
Makefile
.PRECIOUS:${BOOT_CODE}
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########## BUILD OPTIONS ##########
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QUIET=1
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# QUIET: 1=clean, non-verbose output
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# 2=normal make output
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####### SIMULATION OPTIONS ########
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SIM=VERILATOR
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# SIM: VERILATOR: use Verilator
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# ICARUS: use Icarus Verilog
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NUMACTL=#numactl -m 0 -C 0,1 --
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######## SYNTHESIS OPTIONS ########
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# BOARD: the options are the directories in system/fpga_config/.
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# Select the one you have
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FPGA_BOARD=OrangeCrab_r0.2.1
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# If this options is set to 1, builds with different seeds will be
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# considered separate, in combination with the fact that this build
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# system by default is generating a new seed for each build, it means
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# that for each build a new set of files gets created in the build
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# directory with the seed number on the filename without overwriting
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# the old ones.
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BUILD_SEED_DIFFERENTIATION=0
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VERSION="v0.3.0-dev"
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COMMIT=$(shell git log --pretty=format:'%H' -1 |cat)
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ifeq "${QUIET}" "1"
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QUIET_AS = @echo ' AS '$@;
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QUIET_VVP = @echo ' VVP '$@;
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QUIET_IVERILOG = @echo ' IVERILOG '$@;
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QUIET_VERILATOR = @echo ' VERILATOR '$@;
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QUIET_CC = @echo ' CC '$@;
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QUIET_YOSYS = @echo ' YOSYS '$@;
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QUIET_NEXTPNR = @echo ' NEXTPNR '$@;
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QUIET_ECPPACK = @echo ' ECPPACK '$@;
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QUIET_DFU_SUFFIX = @echo ' DFU-SUFFIX '$@;
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QUIET_DFU_UTIL = @echo ' DFU-UTIL '$<;
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QUIET_DOWNLOAD = @echo ' DOWNLOAD '$@;
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QUIET_CLEAN = @echo ' CLEAN '$1;
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QUIET_VERILATOR_RUN = @printf ' %s %s\n' $1 $2;
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Q = @
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MAKEOPTS=--no-print-directory
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.SILENT:
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else
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Q =
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endif
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.PHONY: run wave disas
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run: $(subst .txt,.run,${BOOT_CODE})
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wave: $(subst .txt,.wave,${BOOT_CODE})
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disas: $(subst .txt,.disas,${BOOT_CODE})
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# Assembling code
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%.stxt: %.bin
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${Q}dd if=/dev/zero bs=1 count=2048 of="$(subst .bin,.stage,$<)" status=none
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${Q}dd if="$<" bs=1 skip=63488 of="$(subst .bin,.stage,$<)" conv=notrunc,nocreat status=none
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${Q}xxd -ps -c 2 "$(subst .bin,.stage,$<)" > "$@"
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${Q}rm "$(subst .bin,.stage,$<)"
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# Assembling code
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%.txt:%.bin
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${Q}dd if=/dev/zero bs=1 count=65536 of="$(subst .bin,.stage,$<)" status=none
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${Q}dd if="$<" of="$(subst .bin,.stage,$<)" conv=notrunc,nocreat status=none
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${Q}xxd -ps -c 2 "$(subst .bin,.stage,$<)" > "$@"
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${Q}rm "$(subst .bin,.stage,$<)"
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ifeq "${NO_ASM}" "0"
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%.bin:%.asm
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${QUIET_AS}
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${Q}as86 -0 "$<" -b "$@"
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endif
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# Running simulation
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ifeq "${SIM}" "ICARUS"
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%.fst %.memdump: %.txt ${SYSTEM_VVP} ${MICROCODE}
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${QUIET_VVP}
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${Q}vvp "${SYSTEM_VVP}" -fst +VERSION=${VERSION} +COMMIT=${COMMIT} +BOOT_CODE="$<" +WAVEFORM="$(subst .txt,.fst,$<)" +MEMDUMP="$(subst .txt,.memdumptxt,$<)" +MICROCODE="${MICROCODE}"
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${Q}grep -v '^//' "$(subst .txt,.memdumptxt,$<)" | xxd -ps -c 2 -r > "$(subst .txt,.memdump,$<)"
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${Q}rm "$(subst .txt,.memdumptxt,$<)"
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%.run: %.txt ${SYSTEM_VVP} ${MICROCODE}
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${QUIET_VVP}
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${Q}vvp -i "${SYSTEM_VVP}" +VERSION=${VERSION} +COMMIT=${COMMIT} +BOOT_CODE="$<" +MICROCODE="${MICROCODE}"
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%.json: %.txt ${SYSTEM_VVP} ${MICROCODE}
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${QUIET_VVP}
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${Q}vvp -i "${SYSTEM_VVP}" +VERSION=${VERSION} +COMMIT=${COMMIT} +STATS="$@" +BOOT_CODE="$<" +MICROCODE="${MICROCODE}"
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else ifeq "${SIM}" "VERILATOR"
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%.fst %.memdump: %.txt ${VERILATOR_BIN} ${MICROCODE}
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$(call QUIET_VERILATOR_RUN,$(word 2,$^),$<)
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${Q}"${VERILATOR_BIN}" +VERSION=${VERSION} +COMMIT=${COMMIT} +BOOT_CODE="$<" +WAVEFORM="$(subst .txt,.fst,$<)" +MEMDUMP="$(subst .txt,.memdumptxt,$<)" +MICROCODE="${MICROCODE}"
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${Q}grep -v '^//' "$(subst .txt,.memdumptxt,$<)" | xxd -ps -c 2 -r > "$(subst .txt,.memdump,$<)"
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${Q}rm "$(subst .txt,.memdumptxt,$<)"
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%.json: %.txt ${VERILATOR_BIN} ${MICROCODE}
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$(call QUIET_VERILATOR_RUN,$(word 2,$^),$<)
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${Q} ${NUMACTL} "${VERILATOR_BIN}" +VERSION=${VERSION} +COMMIT=${COMMIT} +STATS=$@ +BOOT_CODE="$<" +MICROCODE="${MICROCODE}"
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%.run: %.txt ${VERILATOR_BIN} ${MICROCODE}
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$(call QUIET_VERILATOR_RUN,$(word 2,$^),$<)
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${Q} ${NUMACTL} "${VERILATOR_BIN}" +VERSION=${VERSION} +COMMIT=${COMMIT} +BOOT_CODE="$<" +MICROCODE="${MICROCODE}"
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endif
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%.disas: %.bin
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objdump -D -b binary -m i8086 $^ | less
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# Tools
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%.wave : %.fst
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gtkwave "$<" "${GTKWSAVE}"
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