30 lines
1.1 KiB
Verilog
30 lines
1.1 KiB
Verilog
/* memory.v - implementation of memory external to the 9086 CPU for testing purposes
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This file is part of the 9086 project.
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Copyright (c) 2023 Efthymios Kritikos
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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module rom(input [19:0] address,output wire [15:0] data ,input rd,input cs);
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reg [15:0] memory [0:599];
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initial begin
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string boot_code;
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if(!$value$plusargs("BOOT_CODE=%s",boot_code))
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boot_code="boot_code.txt";
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$readmemh(boot_code, memory);
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end
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assign data = !rd & !cs ? memory[address]: 'hz;
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endmodule
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