(Tim) Efthimis Kritikos 63ea29e399 Peripherals/Memory: Added support for the litedram DDR memory controller, created a new memory map and updated all relevant code and files including the addition of rudimentary wait state support for the cpu (BIU)		2023-12-03 19:24:39 +00:00
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config.mk	Updated README, improved fpga-specific makefile options and updated the version number	2023-11-07 14:37:22 +00:00
fpga_top.v	Peripherals/Memory: Added support for the litedram DDR memory controller, created a new memory map and updated all relevant code and files including the addition of rudimentary wait state support for the cpu (BIU)	2023-12-03 19:24:39 +00:00
pin_constraint.pcf	Added OrangeCrab board-specific code to connect the cpu to the outside world	2023-11-02 20:40:04 +00:00