(Tim) Efthimis Kritikos 0d4221f9de Added config file (mainly for debug verbosity) and kind of patched some weird behaviour when clock is stopped		2023-02-13 15:24:21 +00:00
..
alu_header.v	Improved ALU and added more INC and a DEC instruction	2023-02-11 14:43:53 +00:00
alu.v	Fixed ALU bug and added missed updates to the Wbit	2023-02-12 01:28:37 +00:00
boot_code.asm	Improved ALU and added more INC and a DEC instruction	2023-02-11 14:43:53 +00:00
brainfuck.asm	Wrote very basic brainfuck interpreter in 8086 asm to work on making it run and prove Turing completeness	2023-02-11 01:12:54 +00:00
config.v	Added config file (mainly for debug verbosity) and kind of patched some weird behaviour when clock is stopped	2023-02-13 15:24:21 +00:00
gtkwave_savefile.gtkw	Improved execution state logic, cleaned up code and fixed register file output enable	2023-02-10 01:45:27 +00:00
Makefile	Added config file (mainly for debug verbosity) and kind of patched some weird behaviour when clock is stopped	2023-02-13 15:24:21 +00:00
memory.v	Wrote very basic brainfuck interpreter in 8086 asm to work on making it run and prove Turing completeness	2023-02-11 01:12:54 +00:00
proc_state_def.v	Added support for some register indirect addressing modes. Also added documentation comments and did some general cleanup	2023-02-11 20:27:28 +00:00
processor.v	Added config file (mainly for debug verbosity) and kind of patched some weird behaviour when clock is stopped	2023-02-13 15:24:21 +00:00
registers.v	Added config file (mainly for debug verbosity) and kind of patched some weird behaviour when clock is stopped	2023-02-13 15:24:21 +00:00
testbench.v	Added config file (mainly for debug verbosity) and kind of patched some weird behaviour when clock is stopped	2023-02-13 15:24:21 +00:00