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No commits in common. "cd918302cc8b5ff4496c864128a2362265c16036" and "e685c52ddd0099fa204182c0e962bcd90117ed9e" have entirely different histories.
cd918302cc
...
e685c52ddd
@ -30,6 +30,6 @@ boot_code.txt:boot_code.bin
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boot_code.bin:boot_code.asm
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boot_code.bin:boot_code.asm
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as86 -0 $< -b $@
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as86 -0 $< -b $@
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.PHONY: disas
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.PHONY: dumpas
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disas: boot_code.bin
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dumpas: boot_code.bin
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objdump -D -b binary -m i8086 boot_code.bin
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objdump -D -b binary -m i8086 boot_code.bin
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@ -1,6 +1,3 @@
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MOV AX,#0x0000
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MOV CX,#0x0000
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MOV BX,#0x0000
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ADD AX,#0xDEAD
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ADD AX,#0xDEAD
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ADD CX,#0xBEEF
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ADD CX,#0xBEEF
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ADD CX,#0x4111
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ADD CX,#0x4111
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@ -73,7 +73,7 @@ mux4 #(.WIDTH(16)) MUX16_1A(
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ADDER16_1A);
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ADDER16_1A);
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mux4 #(.WIDTH(16)) MUX16_1B(
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mux4 #(.WIDTH(16)) MUX16_1B(
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PARAM2,
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16'b0,
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reg_read_data,
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reg_read_data,
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16'b0,
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16'b0,
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16'b0,
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16'b0,
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@ -186,20 +186,6 @@ always @(posedge clock) begin
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end
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end
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endcase
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endcase
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end
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end
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6'b101100,
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6'b101101,
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6'b101110,
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6'b101111 : begin
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/*Move Immediate to register*/
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unaligned_access=~unaligned_access;
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in1_sel=2'b00;
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in2_sel=2'b00;
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out_sel=2'b11;
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reg_addr=CIR[10:8];
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ALU_OUT=0;
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PARAM2=0;
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state=`PROC_DE_LOAD_16_PARAM;
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end
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6'b111111 : begin
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6'b111111 : begin
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/* INC */
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/* INC */
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if (CIR[9:9] == 1 ) begin
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if (CIR[9:9] == 1 ) begin
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@ -2,6 +2,16 @@ module register_file ( input [2:0]addr1, inout [15:0]data1, input wire read1, in
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reg [15:0] registers [7:0];
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reg [15:0] registers [7:0];
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assign data2 = !read2 ? registers[addr2] : 'hz;
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assign data2 = !read2 ? registers[addr2] : 'hz;
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assign data1 = !read1 ? registers[addr1] : 'hz;
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assign data1 = !read1 ? registers[addr1] : 'hz;
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initial begin
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registers['b000]=0;
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registers['b001]=0;
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registers['b010]=0;
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registers['b011]=0;
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registers['b100]=0;
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registers['b101]=0;
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registers['b110]=0;
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registers['b111]=0; // TODO Don't clear. Remove after we implement the MOV instruction
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end
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always @(negedge write1) begin
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always @(negedge write1) begin
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registers[addr1] = data1;
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registers[addr1] = data1;
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//$display("registers: 0:%04x 1:%04x 2:%04x",registers[0],registers[1],registers[2]);
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//$display("registers: 0:%04x 1:%04x 2:%04x",registers[0],registers[1],registers[2]);
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