Compare commits
	
		
			No commits in common. "cd918302cc8b5ff4496c864128a2362265c16036" and "e685c52ddd0099fa204182c0e962bcd90117ed9e" have entirely different histories.
		
	
	
		
			cd918302cc
			...
			e685c52ddd
		
	
		
| @ -30,6 +30,6 @@ boot_code.txt:boot_code.bin | |||||||
| boot_code.bin:boot_code.asm | boot_code.bin:boot_code.asm | ||||||
| 	as86 -0 $< -b $@ | 	as86 -0 $< -b $@ | ||||||
| 
 | 
 | ||||||
| .PHONY: disas | .PHONY: dumpas | ||||||
| disas: boot_code.bin | dumpas: boot_code.bin | ||||||
| 	objdump -D -b binary -m i8086 boot_code.bin | 	objdump -D -b binary -m i8086 boot_code.bin | ||||||
|  | |||||||
| @ -1,6 +1,3 @@ | |||||||
| MOV AX,#0x0000 |  | ||||||
| MOV CX,#0x0000 |  | ||||||
| MOV BX,#0x0000 |  | ||||||
| ADD AX,#0xDEAD | ADD AX,#0xDEAD | ||||||
| ADD CX,#0xBEEF | ADD CX,#0xBEEF | ||||||
| ADD CX,#0x4111 | ADD CX,#0x4111 | ||||||
|  | |||||||
| @ -73,7 +73,7 @@ mux4 #(.WIDTH(16)) MUX16_1A( | |||||||
| 	ADDER16_1A); | 	ADDER16_1A); | ||||||
| 
 | 
 | ||||||
| mux4 #(.WIDTH(16)) MUX16_1B( | mux4 #(.WIDTH(16)) MUX16_1B( | ||||||
| 	PARAM2, | 	16'b0, | ||||||
| 	reg_read_data, | 	reg_read_data, | ||||||
| 	16'b0, | 	16'b0, | ||||||
| 	16'b0, | 	16'b0, | ||||||
| @ -186,20 +186,6 @@ always @(posedge clock) begin | |||||||
| 						end | 						end | ||||||
| 					endcase | 					endcase | ||||||
| 				end | 				end | ||||||
| 				6'b101100, |  | ||||||
| 				6'b101101, |  | ||||||
| 				6'b101110, |  | ||||||
| 				6'b101111 : begin |  | ||||||
| 					/*Move Immediate to register*/ |  | ||||||
| 					unaligned_access=~unaligned_access; |  | ||||||
| 					in1_sel=2'b00; |  | ||||||
| 					in2_sel=2'b00; |  | ||||||
| 					out_sel=2'b11; |  | ||||||
| 					reg_addr=CIR[10:8]; |  | ||||||
| 					ALU_OUT=0; |  | ||||||
| 					PARAM2=0; |  | ||||||
| 					state=`PROC_DE_LOAD_16_PARAM; |  | ||||||
| 				end |  | ||||||
| 				6'b111111 : begin | 				6'b111111 : begin | ||||||
| 					/* INC */ | 					/* INC */ | ||||||
| 					if (CIR[9:9] == 1 ) begin | 					if (CIR[9:9] == 1 ) begin | ||||||
|  | |||||||
| @ -2,6 +2,16 @@ module register_file ( input [2:0]addr1, inout [15:0]data1, input wire read1, in | |||||||
| reg [15:0] registers [7:0]; | reg [15:0] registers [7:0]; | ||||||
| assign data2 = !read2 ? registers[addr2] : 'hz; | assign data2 = !read2 ? registers[addr2] : 'hz; | ||||||
| assign data1 = !read1 ? registers[addr1] : 'hz; | assign data1 = !read1 ? registers[addr1] : 'hz; | ||||||
|  | initial begin  | ||||||
|  | 	registers['b000]=0; | ||||||
|  | 	registers['b001]=0; | ||||||
|  | 	registers['b010]=0; | ||||||
|  | 	registers['b011]=0; | ||||||
|  | 	registers['b100]=0; | ||||||
|  | 	registers['b101]=0; | ||||||
|  | 	registers['b110]=0; | ||||||
|  | 	registers['b111]=0; // TODO Don't clear. Remove after we implement the MOV instruction | ||||||
|  | end | ||||||
| always @(negedge write1) begin | always @(negedge write1) begin | ||||||
| 	registers[addr1] = data1; | 	registers[addr1] = data1; | ||||||
| 	//$display("registers: 0:%04x 1:%04x 2:%04x",registers[0],registers[1],registers[2]); | 	//$display("registers: 0:%04x 1:%04x 2:%04x",registers[0],registers[1],registers[2]); | ||||||
|  | |||||||
		Loading…
	
		Reference in New Issue
	
	Block a user