Cleaned up processor.v a bit
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@ -79,7 +79,7 @@ always @(posedge valid_input) begin
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end
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end
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end
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end
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always @(negedge set_initial_values) begin
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always @( set_initial_values) begin
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PARAM1 <= PARAM1_INIT;
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PARAM1 <= PARAM1_INIT;
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PARAM2 <= PARAM2_INIT;
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PARAM2 <= PARAM2_INIT;
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end
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end
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@ -26,7 +26,6 @@
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`define PROC_STATE_BITS 3
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`define PROC_STATE_BITS 3
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`define PROC_RESET 3'b000
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`define PROC_RESET 3'b000
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`define PROC_DE_STATE_ENTRY 3'b001
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`define PROC_DE_STATE_ENTRY 3'b001
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`define PROC_WAIT 3'b010
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`define PROC_HALT 3'b011
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`define PROC_HALT 3'b011
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//HALT: active high
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//HALT: active high
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@ -215,51 +214,36 @@ always @(posedge clock) begin
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SIMPLE_MICRO <= 0;
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SIMPLE_MICRO <= 0;
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proc_state <= `PROC_DE_STATE_ENTRY;
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proc_state <= `PROC_DE_STATE_ENTRY;
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owe_set_init <= 0;
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owe_set_init <= 0;
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set_initial_values<=0;
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end
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end
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`PROC_DE_STATE_ENTRY:begin
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`PROC_DE_STATE_ENTRY:begin
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if(VALID_INSTRUCTION==1 || SIMPLE_MICRO == 1 ) begin
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if( VALID_INSTRUCTION==1 || SIMPLE_MICRO == 1 ) begin
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if(work==0) begin
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if(work==0) begin
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DE_OUTPUT_sampled <= DE_OUTPUT;
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DE_OUTPUT_sampled <= DE_OUTPUT;
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if(SIMPLE_MICRO==0||owe_set_init==1)begin
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if(SIMPLE_MICRO==0||owe_set_init==1)begin
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valid_instruction_ack <= !valid_instruction_ack;
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/* This runs at the start of the execution of an 8086 instruction */
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owe_set_init<=0;
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set_initial_values<=0;
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`ifdef DEBUG_PC_ADDRESS
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`ifdef DEBUG_PC_ADDRESS
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$display("Running command at %04x (%08x)",INSTRUCTION_LOCATION,INSTRUCTION);
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$display("Running command at %04x (%08x)",INSTRUCTION_LOCATION,INSTRUCTION);
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`endif
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`endif
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`ifdef CALCULATE_IPC
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`ifdef CALCULATE_IPC
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new_instruction <= !new_instruction;
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new_instruction <= !new_instruction;
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`endif
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`endif
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valid_instruction_ack <= !valid_instruction_ack;
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owe_set_init<=0;
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set_initial_values<= !set_initial_values;
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ProgCount <= INSTRUCTION_LOCATION+{12'b0,instr_end};
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ProgCount <= INSTRUCTION_LOCATION+{12'b0,instr_end};
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INSTRUCTION_BUFFER<=INSTRUCTION[23:0];
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INSTRUCTION_BUFFER<=INSTRUCTION[23:0];
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end
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end
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if ( (ucode_seq_addr==`UCODE_NO_INSTRUCTION) && (ucode_seq_addr_entry!=`UCODE_NO_INSTRUCTION) )begin
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if ( (ucode_seq_addr==`UCODE_NO_INSTRUCTION) && (ucode_seq_addr_entry!=`UCODE_NO_INSTRUCTION) )begin
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/*switch to microcode decoding*/
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/* switch to microcode decoding */
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ucode_seq_addr <= ucode_seq_addr_entry;
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ucode_seq_addr <= ucode_seq_addr_entry;
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SIMPLE_MICRO <= 1;
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SIMPLE_MICRO <= 1;
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/*keep proc_state the same and rerun decode this time with all the data from the microcode rom*/
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/*keep proc_state the same and rerun decode this time with all the data from the microcode rom*/
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end else begin
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end else begin
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/* This runs at the start of each execution cycle, with microcode this is more than once per 8086 instruction */
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valid_exec_data <= 1;
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valid_exec_data <= 1;
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proc_state <= `PROC_WAIT;
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end
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end else begin
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if( DE_DEPENDS_ON_PREVIOUS == 0)
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if ( (ucode_seq_addr==`UCODE_NO_INSTRUCTION) && (ucode_seq_addr_entry!=`UCODE_NO_INSTRUCTION) )begin
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/*switch to microcode decoding*/
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ucode_seq_addr <= ucode_seq_addr_entry;
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SIMPLE_MICRO <= 1;
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owe_set_init <= 1;
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/*keep proc_state the same and rerun decode this time with all the data from the microcode rom*/
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end
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end
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end
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end
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`PROC_WAIT:begin
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set_initial_values<=1;
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valid_exec_data<=0;
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proc_state <= `PROC_DE_STATE_ENTRY;
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if( SIMPLE_MICRO == 1 ) begin
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if( SIMPLE_MICRO == 1 ) begin
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ucode_seq_addr <= ucode_seq_addr_entry; /*Reused for next address*/
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ucode_seq_addr <= ucode_seq_addr_entry; /*Reused for next address*/
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if( ucode_seq_addr_entry == `UCODE_NO_INSTRUCTION )begin
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if( ucode_seq_addr_entry == `UCODE_NO_INSTRUCTION )begin
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@ -268,6 +252,20 @@ always @(posedge clock) begin
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end
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end
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end
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end
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end
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end
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end else begin
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valid_exec_data <= 0;
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if( DE_DEPENDS_ON_PREVIOUS == 0 )
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if ( (ucode_seq_addr==`UCODE_NO_INSTRUCTION) && (ucode_seq_addr_entry!=`UCODE_NO_INSTRUCTION) && valid_exec_data==0 )begin
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/*switch to microcode decoding*/
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ucode_seq_addr <= ucode_seq_addr_entry;
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SIMPLE_MICRO <= 1;
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owe_set_init <= 1;
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/*keep proc_state the same and rerun decode this time with all the data from the microcode rom*/
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end
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end
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end else
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valid_exec_data <= 0;
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end
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`PROC_HALT:begin
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`PROC_HALT:begin
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end
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end
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default:begin
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default:begin
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