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Updated toolchain versions and run project through aspell

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This commit is contained in:
(Tim) Efthimis Kritikos 2023-03-03 06:54:33 +00:00
parent f60084344e
commit e1bb98c0f0
2 changed files with 5 additions and 5 deletions
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6
README.md
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@ -20,10 +20,10 @@ After that you can run `make` on the top level directory and it should build eve
At the time of development the versions used are :
* Icarus Verilog version 11.0 (stable)
* bin86 version: 0.16.17
* GNU Make 4.3
* bin86 version: 0.16.21
* GNU Make 4.4.1
* xxd 2022-01-14
* GNU coreutils 8.32
* GNU coreutils 9.1
### License
All parts of this project are licensed under the GNU General Public License version 3 or later

4
system/processor.v
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@ -52,7 +52,7 @@ wire [3:0]INSTRUCTION_INFO;
wire [1:0]DECODER_SIGNALS;
wire [`UCODE_ADDR_BITS-1:0] ucode_seq_addr_entry;
reg SIMPLE_MICRO; /* otuput simple decodings (=0) or microcode data (=1) */
reg SIMPLE_MICRO; /* output simple decodings (=0) or microcode data (=1) */
wire [2:0] DE_instruction_size;
reg instruction_size_init;
wire [2:0] instruction_size;
@ -265,7 +265,7 @@ always @(posedge clock) begin
if(SIMPLE_MICRO==0)begin
/*This flag is set at reset and jump because
* at IF we need to know the size of the
* previous instruction (specificly if it was
* previous instruction (specifically if it was
* a single byte and the value would be
* incorrect in both cases. So when it gets
* set reset it only at the start of the next