update

README.md

@@ -4,14 +4,16 @@
 A CPU that aims to be binary compatible with the 8086 and with as many optimisations as possible
 
 ### Progress
-* [X] Executing code
-* [X] Is Turing complete
-* [ ] Can boot up MS-DOS / FreeDOS
-* [ ] Is completely binary compatible
-* [ ] Is pipelined
-* [ ] Is Out of Order
-* [ ] Is superscalar
-* [ ] Has been successfully synthesized
+
+* [ ] 8086
+  * [X] Executing code
+  * [X] Is Turing complete
+  * [ ] Can boot up MS-DOS / FreeDOS
+  * [ ] Is completely binary compatible
+  * [ ] Is pipelined
+  * [ ] Is Out of Order
+  * [ ] Is superscalar
+  * [ ] Has been successfully synthesized
 
 ### Simulating it
 Both Verilator and Icarus Verilog can be used for simulation. You can select which one you want with the SIM variable on [common.mk](./common.mk)
@@ -30,3 +32,12 @@ After that you can run `make` on the top level directory and it should build eve
 
 ### License
 All parts of this project are licensed under the GNU General Public License version 3 or later
+
+### Versions
+The version consist of three numbers:
+
+1. The CPU that this version aims to be compatible with
+1. The specific milestone
+1. Patch level
+
+For example v1.3.2 aims to support 80186 code, is on the fourth milestone and has 2 bug fixes since the milestone was reached.