Tightened up write timing
This commit is contained in:
parent
b7bfbd4e33
commit
c854818d6d
10
system/biu.v
10
system/biu.v
@ -28,7 +28,6 @@
|
||||
`define BIU_PUT_BYTE 4'b0100
|
||||
`define BIU_PUT_UNALIGNED_16BIT_DATA 4'b0101
|
||||
`define BIU_PUT_ALIGNED_16BIT_DATA 4'b0110
|
||||
`define BIU_PUT_UNALIGNED_PREP_NEXT 4'b0111
|
||||
`define BIU_PUT_UNALIGNED_PREP_NEXT2 4'b1000
|
||||
`define BIU_WRITE_EXIT 4'b1001
|
||||
`define BIU_WRITE_RELEASE 4'b1010
|
||||
@ -177,9 +176,6 @@ always @(posedge clock) begin
|
||||
`endif
|
||||
BHE <= 0;
|
||||
data_bus_output_register <= {DATA[7:0],DATA[15:8]};
|
||||
biu_state <= `BIU_PUT_UNALIGNED_PREP_NEXT;
|
||||
end
|
||||
`BIU_PUT_UNALIGNED_PREP_NEXT:begin
|
||||
write <= 0;
|
||||
biu_state <= `BIU_PUT_UNALIGNED_PREP_NEXT2;
|
||||
end
|
||||
@ -194,14 +190,14 @@ always @(posedge clock) begin
|
||||
$display("Writing 16bit %04x at %04x",DATA,DATA_ADDRESS);
|
||||
`endif
|
||||
data_bus_output_register <= {DATA[15:8],DATA[7:0]};
|
||||
biu_state <= `BIU_WRITE_EXIT;
|
||||
write <= 0;
|
||||
biu_state <= `BIU_WRITE_RELEASE;
|
||||
end
|
||||
|
||||
`BIU_PUT_BYTE:begin
|
||||
`ifdef DEBUG_DATA_READ_WRITES
|
||||
$display("Writing 8bit %02x at %04x",DATA[7:0],DATA_ADDRESS);
|
||||
`endif
|
||||
biu_state <= `BIU_WRITE_EXIT;
|
||||
if(ADDRESS_INPUT[0:0]==0) begin
|
||||
BHE <= 1;
|
||||
data_bus_output_register <= {8'b0,DATA[7:0]};
|
||||
@ -209,6 +205,8 @@ always @(posedge clock) begin
|
||||
BHE <= 0;
|
||||
data_bus_output_register <= {DATA[7:0],8'b0};
|
||||
end
|
||||
write <= 0;
|
||||
biu_state <= `BIU_WRITE_RELEASE;
|
||||
end
|
||||
`BIU_WRITE_EXIT:begin
|
||||
write <= 0;
|
||||
|
Loading…
Reference in New Issue
Block a user