Removed erroneous file and run aspell
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c25d2eaf19
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@ -588,10 +588,10 @@ always @( CIR or SIMPLE_MICRO or seq_addr_input ) begin
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11'b1100_1101_???:begin
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/* INT - execute interrupt handler */
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/* 1 1 0 0 1 1 0 1 | DATA |*/
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// [skiped] 1) push flags
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// [skiped] 2) clear trap and interrupt enable flag
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// [skiped] 3) push CS
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// [skiped] 4) fetch CS from interrupt table
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// [skipped] 1) push flags
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// [skipped] 2) clear trap and interrupt enable flag
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// [skipped] 3) push CS
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// [skipped] 4) fetch CS from interrupt table
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// 5) push ProgCount
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// 6) fetch ProgCount from interrupt table
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instruction_size=2;
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@ -621,7 +621,7 @@ always @( CIR or SIMPLE_MICRO or seq_addr_input ) begin
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11'b1100_1111_???:begin
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/* IRET - Return from interrupt */
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/* | 1 1 0 0 1 1 1 1 | */
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// Sicne we only push one thing on the stack
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// Since we only push one thing on the stack
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// on INT we can just reuse the code from RET
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instruction_size=1;
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opcode_size=0;
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@ -62,7 +62,7 @@ always @(negedge write_port1_we) begin
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end
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end
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`ifdef DEBUG_REG_WRITES
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// Icarus verilog really doesn't like non-blocking assignments
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// Icarus Verilog really doesn't like non-blocking assignments
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// here
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/* verilator lint_off BLKSEQ */
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if(write_port1_addr[3:2]==2'b11)begin
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@ -1,4 +1,4 @@
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# This file is basicly to make verilator compilation look pretty.
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# This file is basically to make verilator compilation look pretty.
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# If the project doesn't compile it might be because verilator handles compilation
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# differently and this patch doesn't work anymore. In such case remove everything
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# except the include Vsystem.mk line and try again.
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