Removed more "conflicting driver" issues with yet more performance penalties...

This commit is contained in:
(Tim) Efthimis Kritikos 2023-11-04 15:33:23 +00:00
parent df2975fa09
commit aa9b7c0a50
4 changed files with 182 additions and 179 deletions

View File

@ -104,6 +104,7 @@ reg owe_set_init;
reg VALID_INSTRUCTION_lc;
always @(VALID_INSTRUCTION)begin VALID_INSTRUCTION_lc<=VALID_INSTRUCTION; end
reg wait_;
always @(posedge clock)begin
if(reset==0)begin
@ -119,8 +120,11 @@ always @(posedge clock)begin
HALT_LATCHED <= 0;
ERROR_LATCHED <= `ERROR_BITS'h0;
VALID_INSTRUCTION_ACK <= 0;
wait_<=0;
end else begin
if(next_exec==1'b1)begin
if(wait_!=0)
wait_<=0;
else if(next_exec==1'b1)begin
if ( ( VALID_INSTRUCTION_lc == 1 || SIMPLE_MICRO == 1 ) /*&& DEPENDS_ON_PREVIOUS == 0 && ucode_seq_addr_entry==`UCODE_NO_INSTRUCTION*/) begin
//`define LATCH(VAR) VAR_LATCHED <= VAR; //TODO would this work?
IN_MOD_LATCHED <= IN_MOD;
@ -147,6 +151,7 @@ always @(posedge clock)begin
SIMPLE_MICRO <= 1;
first_ucode <= 1;
set_initial_values <= !set_initial_values;
valid_exec_data<=0;
end else begin
if(SIMPLE_MICRO==0||first_ucode==1||owe_set_init==1)begin
first_ucode <= 0;
@ -165,7 +170,8 @@ always @(posedge clock)begin
set_initial_values <= !set_initial_values;
end
/* This runs at the start of each execution cycle, with microcode this is more than once per 8086 instruction */
valid_exec_data<=!valid_exec_data;
valid_exec_data<=1;
wait_<=1;
if( SIMPLE_MICRO == 1 ) begin
ucode_seq_addr <= ucode_seq_addr_entry; /*Reused for next address*/
if( ucode_seq_addr_entry == `UCODE_NO_INSTRUCTION )begin
@ -174,8 +180,10 @@ always @(posedge clock)begin
end
end
end
end
end
end else
valid_exec_data<=0;
end else
valid_exec_data<=0;
end
end

View File

@ -21,6 +21,7 @@
`define EXEC_STATE_BITS 4
//TODO: Please clean this up
`define EXEC_WAIT 4'b1100
/*DECODE SATE*/

View File

@ -93,32 +93,19 @@ ALU ALU1(
/*############ Execute logic ########################################################## */
always @(valid_input) begin
exec_state <= init_state;
reg_write_we <= 1;
biu_jump_req <= 0;
use_exec_reg_addr <= 0;
next_exec<=0;
end
always @( set_initial_values) begin
PARAM1 <= PARAM1_INIT;
PARAM2 <= PARAM2_INIT;
end
always @(negedge reset) begin
exec_state <= `EXEC_WAIT;
end
always @(posedge reset) begin
exec_state <= `EXEC_RESET;
end
`define unimpl_addressing_mode exec_state <= `EXEC_WAIT;ERROR <= `ERR_UNIMPL_ADDRESSING_MODE;
`define finished_instruction exec_state <= `EXEC_WAIT;next_exec<=1;
always @(posedge clock) begin
if ( !reset ) begin
exec_state <= `EXEC_RESET;
end else begin
case (exec_state)
`EXEC_RESET: begin
biu_write_request <= 0;
@ -129,10 +116,16 @@ always @(posedge clock) begin
ERROR <= `ERR_NO_ERROR;
end
`EXEC_WAIT:begin
if(valid_input)begin
exec_state <= init_state;
next_exec<=0;
end else begin
next_exec<=1;
end
biu_jump_req <= 0;
reg_write_we <= 1;
use_exec_reg_addr <= 0;
ERROR<=`ERR_NO_ERROR;
next_exec<=1;
end
`EXEC_DE_LOAD_REG_TO_PARAM:begin
PARAM2<=reg_read_port2_data;
@ -321,6 +314,7 @@ always @(posedge clock) begin
end
endcase
end
end
endmodule
`undef unimpl_addressing_mode