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I2C_BOOTLOADER: Several fixes and a 4.5x performance increase as well as the addition of 16bit reads from the I2C_driver

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This commit is contained in:
(Tim) Efthimis Kritikos 2024-02-10 19:42:18 +00:00
parent be402aa8f7
commit a8c29aff9b
2 changed files with 118 additions and 48 deletions
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133
boot_code/i2c_bootloader.asm
View File

@ -19,74 +19,123 @@ outb #0x63
mov al,#0x00
outb #0x60
;wait_send: inw #0x62
;test al,#0x01
;jnz wait_send
mov ax,#0x1FFE
aa:
dec ax
jnz aa
wait_send: inb #0x62
test al,#0x01
jnz wait_send
mov bx,#OK_loading_txt
call print
;############ READ 20% ##################
;############ READ CODE ##################
mov bx,#0xD000
mov bx,#0xEFFF
mov di,#0x0000
rom_read_loop:
mov al,#0x05 ; Read, 8bit, ignore ack
mov al,#0x07 ; Read, 8bit, ignore ack
outb #0x63
mov al,#0x00
outb #0x60
mov ax,#0x1FFE
aa2:
dec ax
jnz aa2
push bx
cmp di,#0x1800
jz print_10
cmp di,#0x3000
jz print_20
cmp di,#0x4800
jz print_30
cmp di,#0x6000
jz print_40
cmp di,#0x7800
jz print_50
cmp di,#0x9000
jz print_60
cmp di,#0xA800
jz print_70
cmp di,#0xC000
jz print_80
cmp di,#0xD800
jz print_90
back:
pop bx
wait_send2: inb #0x62
test al,#0x01
jnz wait_send2
inw #0x60
STOSB
cmp di,#0x2999
jz print_20
cmp di,#0x5333
jz print_40
cmp di,#0x7CCC
jz print_60
cmp di,#0xA666
jz print_80
back:dec bx
jnz rom_read_loop
;MOV CL,AH
;MOV AH,AL
;MOV AL,CL
STOSW
dec bx
jz rom_read_end
dec bx
jz rom_read_end
jmp rom_read_loop
rom_read_end:
MOV AX,#0xC000
JMP AX
print_10:
mov cx,#ten_prc_txt
call print_prc
jmp back
print_20:
mov bx,#twenty_prc_txt
call print
mov cx,#twenty_prc_txt
call print_prc
jmp back
print_30:
mov cx,#thirty_prc_txt
call print_prc
jmp back
print_40:
mov bx,#forty_prc_txt
call print
mov cx,#forty_prc_txt
call print_prc
jmp back
print_50:
mov cx,#fifty_prc_txt
call print_prc
jmp back
print_60:
mov bx,#sixty_prc_txt
call print
mov cx,#sixty_prc_txt
call print_prc
jmp back
print_70:
mov cx,#seventy_prc_txt
call print_prc
jmp back
print_80:
mov bx,#eighty_prc_txt
call print
mov cx,#eighty_prc_txt
call print_prc
jmp back
print_90:
mov cx,#ninty_prc_txt
call print_prc
jmp back
print_prc:
mov bx,#loading_rom_txt
call print
mov bx,cx
call print
ret
;#########################################
include LiteDram_init.asm
@ -105,10 +154,16 @@ STACK: ; brainfuck_mandelbrot depends on stack being at the end
load_i2c_txt: .ASCII 'Read I2C EEPROM:\0'
OK_loading_txt: .ASCII 'OK\nLoading rom 0%\r\0'
twenty_prc_txt: .ASCII 'Loading rom 20%\r\0'
forty_prc_txt: .ASCII 'Loading rom 40%\r\0'
sixty_prc_txt: .ASCII 'Loading rom 60%\r\0'
eighty_prc_txt: .ASCII 'Loading rom 80%\r\0'
loading_rom_txt: .ASCII 'Loading rom \0'
ten_prc_txt: .ASCII '10%\r\0'
twenty_prc_txt: .ASCII '20%\r\0'
thirty_prc_txt: .ASCII '30%\r\0'
forty_prc_txt: .ASCII '40%\r\0'
fifty_prc_txt: .ASCII '50%\r\0'
sixty_prc_txt: .ASCII '60%\r\0'
seventy_prc_txt: .ASCII '70%\r\0'
eighty_prc_txt: .ASCII '80%\r\0'
ninty_prc_txt: .ASCII '90%\r\0'
.ORG 0xFFF0
MOV AX,#0xF800

33
system/peripherals/I2C_driver.v
View File

@ -38,7 +38,7 @@ module I2C_driver (
reg DIR_latched;
reg SDA;
reg SDA; // TODO make SDA_output a reg and rename everything
assign SDA_output=SDA;
@ -181,8 +181,6 @@ always @(posedge clock) begin
6'b010110:begin
SCL<=1;
if(DIR_latched==1'b1)begin
//i2c_data_read[15:0]<={8'h0,SDA_input,i2c_data_read[7:1]};
i2c_data_read[15:0]<={8'h0,i2c_data_read[6:0],SDA_input};
end
i2c_state<=6'b010111;
@ -197,12 +195,21 @@ always @(posedge clock) begin
end
/****** Acknowledge ********/
6'b011000:begin
SDA_direction<=0;
// Note: If we read we want to send an ack,
// If we write we want to read an ack so it's reversed here
if(DIR_latched==1'b1)begin
SDA_direction<=1;
end else begin
SDA_direction<=0;
end
SCL<=0;
i2c_state<=6'b011001;
end
6'b011001:begin
SCL<=0;
if(DIR_latched==1'b1)begin
SDA<=1'b0;
end
i2c_state<=6'b011010;
end
6'b011010:begin
@ -211,13 +218,12 @@ always @(posedge clock) begin
end
6'b011011:begin
SCL<=1;
if (SDA_input==0||ignore_ack==1'b1)begin
if (SDA_input==0||DIR_latched==1'b1)begin
if(trans_width_latch==1'b1)begin
i2c_state<=6'b100101;
data_bit_counter<=4'd0;
end else
i2c_state<=6'b011100;
SDA_direction<=1;
end else begin
i2c_state<=6'b111111;
end
@ -225,18 +231,27 @@ always @(posedge clock) begin
/****** Send data (16bit) ********/
6'b100101:begin
SCL<=0;
SDA_direction<=1;
if(DIR_latched==1'b1)begin
SDA_direction<=0;
end else begin
SDA_direction<=1;
end
i2c_state<=6'b100110;
end
6'b100110:begin
SCL<=0;
SDA<=data_internal[15:15];
data_internal[15:8]<={data_internal[14:8],1'b0};
if(DIR_latched==1'b0)begin
SDA<=data_internal[15:15];
data_internal[15:8]<={data_internal[14:8],1'b0};
end
data_bit_counter<=data_bit_counter+1;
i2c_state<=6'b100111;
end
6'b100111:begin
SCL<=1;
if(DIR_latched==1'b1)begin
i2c_data_read[15:0]<={i2c_data_read[14:8],SDA_input,i2c_data_read[7:0]};
end
i2c_state<=6'b101000;
end
6'b101000:begin