Fixed bug introduced in a previous commit about fixing ADD

This commit is contained in:
(Tim) Efthimis Kritikos 2023-02-24 12:27:29 +00:00
parent 96b7a4d298
commit 9ed3dc3312

View File

@ -100,15 +100,10 @@ always @( CIR or SIMPLE_MICRO or seq_addr_input ) begin
reg_read_port2_addr={Wbit,3'b000};
reg_write_addr={Wbit,3'b000};
ALU_1OP=`ALU_OP_ADD;
case({Sbit,Wbit})
2'b00,2'b11:
next_state=`PROC_DE_LOAD_8_PARAM;
2'b01:
if(Wbit)
next_state=`PROC_DE_LOAD_16_PARAM;
default:begin
`invalid_instruction
end
endcase
else
next_state=`PROC_DE_LOAD_8_PARAM;
end
11'b1000_00xx_101, /* SUB */
11'b1000_00xx_000 : /* ADD */ begin