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fixed more driver conflicts

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This commit is contained in:
(Tim) Efthimis Kritikos 2023-11-06 01:35:48 +00:00
parent ae16c79b0a
commit 5ebd53b11c
2 changed files with 176 additions and 173 deletions
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6
system/decoder.v
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@ -123,6 +123,7 @@ always @(posedge clock)begin
wait_<=0; wait_<=0;
end else begin end else begin
if(wait_!=0) begin if(wait_!=0) begin
set_initial_values <= 0;
wait_<=0; wait_<=0;
VALID_INSTRUCTION_ACK<=0; VALID_INSTRUCTION_ACK<=0;
end else if(next_exec==1'b1)begin end else if(next_exec==1'b1)begin
@ -151,8 +152,9 @@ always @(posedge clock)begin
ucode_seq_addr <= ucode_seq_addr_entry; ucode_seq_addr <= ucode_seq_addr_entry;
SIMPLE_MICRO <= 1; SIMPLE_MICRO <= 1;
first_ucode <= 1; first_ucode <= 1;
set_initial_values <= !set_initial_values; set_initial_values <= 1;
valid_exec_data <= 0; valid_exec_data <= 0;
wait_<=1;
end else begin end else begin
if(SIMPLE_MICRO==0||first_ucode==1||owe_set_init==1)begin if(SIMPLE_MICRO==0||first_ucode==1||owe_set_init==1)begin
first_ucode <= 0; first_ucode <= 0;
@ -168,7 +170,7 @@ always @(posedge clock)begin
VALID_INSTRUCTION_ACK <= 1; VALID_INSTRUCTION_ACK <= 1;
end end
if(set_params)begin if(set_params)begin
set_initial_values <= !set_initial_values; set_initial_values <= 1;
end end
/* This runs at the start of each execution cycle, with microcode this is more than once per 8086 instruction */ /* This runs at the start of each execution cycle, with microcode this is more than once per 8086 instruction */
valid_exec_data<=1; valid_exec_data<=1;

11
system/execute.v
View File

@ -93,11 +93,6 @@ ALU ALU1(
/*############ Execute logic ########################################################## */ /*############ Execute logic ########################################################## */
always @( set_initial_values) begin
PARAM1 <= PARAM1_INIT;
PARAM2 <= PARAM2_INIT;
end
`define unimpl_addressing_mode exec_state <= `EXEC_WAIT;ERROR <= `ERR_UNIMPL_ADDRESSING_MODE; `define unimpl_addressing_mode exec_state <= `EXEC_WAIT;ERROR <= `ERR_UNIMPL_ADDRESSING_MODE;
`define finished_instruction exec_state <= `EXEC_WAIT;next_exec<=1; `define finished_instruction exec_state <= `EXEC_WAIT;next_exec<=1;
@ -106,6 +101,11 @@ always @(posedge clock) begin
if ( !reset ) begin if ( !reset ) begin
exec_state <= `EXEC_RESET; exec_state <= `EXEC_RESET;
end else begin end else begin
if ( set_initial_values )begin
PARAM1 <= PARAM1_INIT;
PARAM2 <= PARAM2_INIT;
end
begin
case (exec_state) case (exec_state)
`EXEC_RESET: begin `EXEC_RESET: begin
biu_write_request <= 0; biu_write_request <= 0;
@ -315,6 +315,7 @@ always @(posedge clock) begin
endcase endcase
end end
end end
end
endmodule endmodule
`undef unimpl_addressing_mode `undef unimpl_addressing_mode