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Fully optimised BIU. Now it can instantly deliver instructions back to back

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This commit is contained in:
(Tim) Efthimis Kritikos 2023-05-16 18:07:28 +01:00
parent f914d1ec8f
commit 53e9d371d7
3 changed files with 62 additions and 8 deletions
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44
system/biu.v
View File

@ -129,6 +129,7 @@ always @(posedge clock) begin
end
end
`ifdef EARLY_VALID_INSTRUCTION
if((Isit1==1) && (FIFO_SIZE!=0) && `EARLY_VALID_INSTRUCTION_)begin
VALID_INSTRUCTION <= 1;
INSTRUCTION[31:24] <= INPUT_FIFO[FIFO_start];
@ -148,6 +149,16 @@ always @(posedge clock) begin
INSTRUCTION[15: 8] <= INPUT_FIFO[FIFO_start+4'd2];
INSTRUCTION[ 7: 0] <= INPUT_FIFO[FIFO_start+4'd3];
end
`else
if(FIFO_SIZE>3)begin
VALID_INSTRUCTION <= 1;
INSTRUCTION[31:24] <= INPUT_FIFO[FIFO_start];
INSTRUCTION[23:16] <= INPUT_FIFO[FIFO_start+4'd1];
INSTRUCTION[15: 8] <= INPUT_FIFO[FIFO_start+4'd2];
INSTRUCTION[ 7: 0] <= INPUT_FIFO[FIFO_start+4'd3];
end
`endif
end
@ -289,19 +300,48 @@ end
wire [2:0] Isize;
InstrSize InstrSize({INSTRUCTION[31:24],INSTRUCTION[21:19]},Isize);
`ifdef INCLUDE_EARLY_CALC_CIRUIT
wire [2:0] fifoIsize;
wire Isit1;
`ifdef EARLY_VALID_INSTRUCTION
InstrSize fifoInstrSize({INPUT_FIFO[FIFO_start][7:0],INPUT_FIFO[FIFO_start+4'd1][5:3]},fifoIsize);
Is1 Is1(INPUT_FIFO[FIFO_start][7:0],Isit1);
`endif
`ifdef DOUBLE_INSTRUCTION_LOAD
wire [2:0] fifoIsize2;
InstrSize fifoInstrSize2({INPUT_FIFO[FIFO_start+fifoIsize][7:0],INPUT_FIFO[FIFO_start+fifoIsize+4'd1][5:3]},fifoIsize2);
`endif
always @( valid_instruction_ack ) begin
/* verilator lint_off BLKSEQ */
FIFO_start = FIFO_start + {1'b0,Isize};
/* verilator lint_on BLKSEQ */
INSTRUCTION_LOCATION <= INSTRUCTION_LOCATION + {12'b0,Isize};;
`ifdef DOUBLE_INSTRUCTION_LOAD
if(FIFO_SIZE>4'd3+Isize)begin
if((fifoIsize2==2) && (FIFO_SIZE > 1+fifoIsize) && `EARLY_VALID_INSTRUCTION_)begin
VALID_INSTRUCTION <= 1;
INSTRUCTION[31:24] <= INPUT_FIFO[FIFO_start];
INSTRUCTION[23:16] <= INPUT_FIFO[FIFO_start+4'd1];
end else if((fifoIsize2==3) && (FIFO_SIZE > 2+fifoIsize) && `EARLY_VALID_INSTRUCTION_)begin
VALID_INSTRUCTION <= 1;
INSTRUCTION[31:24] <= INPUT_FIFO[FIFO_start];
INSTRUCTION[23:16] <= INPUT_FIFO[FIFO_start+4'd1];
INSTRUCTION[15: 8] <= INPUT_FIFO[FIFO_start+4'd2];
end else if(FIFO_SIZE>3+fifoIsize)begin
VALID_INSTRUCTION <= 1;
INSTRUCTION[31:24] <= INPUT_FIFO[FIFO_start];
INSTRUCTION[23:16] <= INPUT_FIFO[FIFO_start+4'd1];
INSTRUCTION[15: 8] <= INPUT_FIFO[FIFO_start+4'd2];
INSTRUCTION[ 7: 0] <= INPUT_FIFO[FIFO_start+4'd3];
end else
VALID_INSTRUCTION <= 0;
end else begin
VALID_INSTRUCTION <= 0;
/* verilator lint_on BLKSEQ */
end
`else
VALID_INSTRUCTION <= 0;
`endif
end
always @( posedge jump_req ) begin

18
system/config.v
View File

@ -34,6 +34,9 @@
* for the maximum instruction size worth of bytes */
`define EARLY_VALID_INSTRUCTION
/* Enables the ability in BIU to pre-decode two instructions, one after the other in memory*/
`define DOUBLE_INSTRUCTION_LOAD
/* Size is in powers of two with minimal 3.
* 3 : 8 Bytes
* 4 : 16 Bytes
@ -44,12 +47,23 @@
/********** Internal **********/
`ifdef OTUPUT_JSON_STATISTICS
`define CALCULATE_IPC
`endif
`ifdef DOUBLE_INSTRUCTION_LOAD
/*Needed for DOUBLE_INSTRUCTION_LOAD*/
`define EARLY_VALID_INSTRUCTION
`endif
`ifdef EARLY_VALID_INSTRUCTION
`define INCLUDE_EARLY_CALC_CIRUIT
`define EARLY_VALID_INSTRUCTION_ 1
`else
`define EARLY_VALID_INSTRUCTION_ 0
`endif
`ifdef OTUPUT_JSON_STATISTICS
`define CALCULATE_IPC
`ifdef CALCULATE_IPC
`define INCLUDE_EARLY_CALC_CIRUIT
`endif

2
system/decoder.v
View File

@ -737,7 +737,7 @@ module InstrSize ( input [10:0] IN, output reg [2:0] VERDICT );
end
endmodule
`ifdef EARLY_VALID_INSTRUCTION
`ifdef INCLUDE_EARLY_CALC_CIRUIT
module Is1 ( input [7:0] IN, output reg VERDICT );
always @( IN ) begin
casez(IN)