Efthimis/9086
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases 1 Wiki Activity

Fixed another driver conflict

Browse Source
This commit is contained in:
(Tim) Efthimis Kritikos 2023-11-05 16:23:05 +00:00
parent aa9b7c0a50
commit 4a5df9c74e
1 changed files with 7 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
system/biu.v
View File

@ -89,8 +89,6 @@ wire [`L1_CACHE_SIZE-1:0] FIFO_SIZE = FIFO_end-FIFO_start;
reg [3:0] biu_state;
reg sane;
reg jump_req_latch;
reg func;
reg [19:0]INSTRUCTION_ADDRESS;
reg [19:0]DATA_ADDRESS;
@ -107,11 +105,13 @@ always @(posedge clock) begin
FIFO_start = `L1_CACHE_SIZE'b0;
FIFO_end = `L1_CACHE_SIZE'b0;
/* verilator lint_on BLKSEQ */
end else if ( jump_req_latch ) begin
end else if ( jump_req ) begin
/* verilator lint_off BLKSEQ */
FIFO_start = FIFO_end ;
/* verilator lint_on BLKSEQ */
INSTRUCTION_ADDRESS <= { 4'b0 , ADDRESS_INPUT };
INSTRUCTION_LOCATION <= ADDRESS_INPUT;
func <= 1;
jump_req_latch <= 0;
if (biu_state==`BIU_READ)
biu_state <= `BIU_NEXT_ACTION;
end else begin
@ -321,7 +321,9 @@ always @( valid_instruction_ack ) begin
end
always @( FIFO_start or FIFO_end ) begin
if(sane==1) begin
if(jump_req==1)begin
VALID_INSTRUCTION <= 0;
end else if(sane==1) begin
//if(VALID_INSTRUCTION == 1 ) begin
// `ifdef DOUBLE_INSTRUCTION_LOAD
// if(FIFO_SIZE>`L1_CACHE_SIZE'd3+{{`L1_CACHE_SIZE-3{1'b0}},Isize})begin
@ -394,11 +396,4 @@ always @( FIFO_start or FIFO_end ) begin
end
end
always @( posedge jump_req ) begin
/* verilator lint_off BLKSEQ */
FIFO_start = FIFO_end ;
/* verilator lint_on BLKSEQ */
jump_req_latch <= 1;
end
endmodule