Fixed another driver conflict
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19
system/biu.v
19
system/biu.v
@ -89,8 +89,6 @@ wire [`L1_CACHE_SIZE-1:0] FIFO_SIZE = FIFO_end-FIFO_start;
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reg [3:0] biu_state;
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reg [3:0] biu_state;
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reg sane;
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reg sane;
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reg jump_req_latch;
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reg func;
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reg func;
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reg [19:0]INSTRUCTION_ADDRESS;
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reg [19:0]INSTRUCTION_ADDRESS;
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reg [19:0]DATA_ADDRESS;
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reg [19:0]DATA_ADDRESS;
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@ -107,11 +105,13 @@ always @(posedge clock) begin
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FIFO_start = `L1_CACHE_SIZE'b0;
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FIFO_start = `L1_CACHE_SIZE'b0;
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FIFO_end = `L1_CACHE_SIZE'b0;
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FIFO_end = `L1_CACHE_SIZE'b0;
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/* verilator lint_on BLKSEQ */
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/* verilator lint_on BLKSEQ */
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end else if ( jump_req_latch ) begin
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end else if ( jump_req ) begin
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/* verilator lint_off BLKSEQ */
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FIFO_start = FIFO_end ;
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/* verilator lint_on BLKSEQ */
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INSTRUCTION_ADDRESS <= { 4'b0 , ADDRESS_INPUT };
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INSTRUCTION_ADDRESS <= { 4'b0 , ADDRESS_INPUT };
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INSTRUCTION_LOCATION <= ADDRESS_INPUT;
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INSTRUCTION_LOCATION <= ADDRESS_INPUT;
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func <= 1;
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func <= 1;
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jump_req_latch <= 0;
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if (biu_state==`BIU_READ)
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if (biu_state==`BIU_READ)
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biu_state <= `BIU_NEXT_ACTION;
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biu_state <= `BIU_NEXT_ACTION;
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end else begin
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end else begin
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@ -321,7 +321,9 @@ always @( valid_instruction_ack ) begin
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end
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end
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always @( FIFO_start or FIFO_end ) begin
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always @( FIFO_start or FIFO_end ) begin
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if(sane==1) begin
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if(jump_req==1)begin
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VALID_INSTRUCTION <= 0;
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end else if(sane==1) begin
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//if(VALID_INSTRUCTION == 1 ) begin
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//if(VALID_INSTRUCTION == 1 ) begin
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// `ifdef DOUBLE_INSTRUCTION_LOAD
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// `ifdef DOUBLE_INSTRUCTION_LOAD
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// if(FIFO_SIZE>`L1_CACHE_SIZE'd3+{{`L1_CACHE_SIZE-3{1'b0}},Isize})begin
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// if(FIFO_SIZE>`L1_CACHE_SIZE'd3+{{`L1_CACHE_SIZE-3{1'b0}},Isize})begin
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@ -394,11 +396,4 @@ always @( FIFO_start or FIFO_end ) begin
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end
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end
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end
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end
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always @( posedge jump_req ) begin
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/* verilator lint_off BLKSEQ */
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FIFO_start = FIFO_end ;
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/* verilator lint_on BLKSEQ */
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jump_req_latch <= 1;
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end
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endmodule
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endmodule
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