Added code to record statistics and a tool to plot them
This commit is contained in:
parent
df342467c7
commit
07d2a80b2e
2
.gitignore
vendored
2
.gitignore
vendored
@ -5,6 +5,7 @@
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*.bf.asm
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*.swp
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*.memdump
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*.json
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boot_code/brainfuck_interpreted.bin
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boot_code/brainfuck_interpreted.txt
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boot_code/brainfuck_mandelbrot.bin
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@ -14,3 +15,4 @@ boot_code/brainfuck_compiled.txt
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system/boot_code.bin
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system/boot_code.txt
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system/obj_dir/
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tools/*svg
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@ -1,9 +1,10 @@
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SOURCE=brainfuck_interpreted.asm brainfuck_compiled.asm brainfuck_mandelbrot.asm
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SOURCE=brainfuck_interpreted.asm brainfuck_compiled.asm brainfuck_mandelbrot.asm pipeline_ideal.asm
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BINARIES=$(subst .asm,.txt,${SOURCE})
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BUILD_FILES=${BINARIES}
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BUILD_FILES+=$(subst .asm,.memdump,${SOURCE})
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BUILD_FILES+=$(subst .asm,.fst,${SOURCE})
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BUILD_FILES+=$(subst .asm,.bin,${SOURCE})
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BUILD_FILES+=$(subst .asm,.json,${SOURCE})
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all: ${BINARIES}
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106
boot_code/pipeline_ideal.asm
Normal file
106
boot_code/pipeline_ideal.asm
Normal file
@ -0,0 +1,106 @@
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org 0x100
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inc ax
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inc bx
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inc bx
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inc bx
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inc ax
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inc ax
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inc ax
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inc bx
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inc ax
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inc bx
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inc ax
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inc bx
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inc ax
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inc bx
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inc ax
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inc bx
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inc ax
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inc bx
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inc ax
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inc bx
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hlt
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.ORG 0xFFF0
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MOV AX,#0x0100
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JMP AX
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@ -32,7 +32,6 @@ run: $(subst .txt,.run,${BOOT_CODE})
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wave: $(subst .txt,.wave,${BOOT_CODE})
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disas: $(subst .txt,.disas,${BOOT_CODE})
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# Assembling code
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%.txt:%.bin
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${Q}dd if=/dev/zero bs=1 count=65536 of="$(subst .bin,.stage,$<)" status=none
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@ -57,6 +56,9 @@ ifeq "${SIM}" "ICARUS"
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%.run: %.txt ${SYSTEM_VVP} ${MICROCODE}
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${QUIET_VVP}
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${Q}vvp -i "${SYSTEM_VVP}" +BOOT_CODE="$<" +MICROCODE="${MICROCODE}"
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%.json: %.txt ${SYSTEM_VVP} ${MICROCODE}
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${QUIET_VVP}
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${Q}vvp -i "${SYSTEM_VVP}" +STATS="$@" +BOOT_CODE="$<" +MICROCODE="${MICROCODE}"
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else ifeq "${SIM}" "VERILATOR"
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%.fst %.memdump: %.txt ${VERILATOR_BIN} ${MICROCODE}
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$(call QUIET_VERILATOR_RUN,$(word 2,$^),$<)
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@ -64,6 +66,9 @@ else ifeq "${SIM}" "VERILATOR"
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${Q}grep -v '^//' "$(subst .txt,.memdumptxt,$<)" | xxd -ps -c 2 -r > "$(subst .txt,.memdump,$<)"
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${Q}rm "$(subst .txt,.memdumptxt,$<)"
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%.json: %.txt ${VERILATOR_BIN} ${MICROCODE}
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$(call QUIET_VERILATOR_RUN,$(word 2,$^),$<)
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${Q} ${NUMACTL} "${VERILATOR_BIN}" +STATS=$@ +BOOT_CODE="$<" +MICROCODE="${MICROCODE}"
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%.run: %.txt ${VERILATOR_BIN} ${MICROCODE}
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$(call QUIET_VERILATOR_RUN,$(word 2,$^),$<)
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${Q} ${NUMACTL} "${VERILATOR_BIN}" +BOOT_CODE="$<" +MICROCODE="${MICROCODE}"
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@ -46,16 +46,16 @@ VERILATOR_OPTS += -x-assign fast --x-initial fast
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# COMPILING
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${SYSTEM_VVP} : ${TOP_LEVEL_SOURCE} ${SOURCES} ${INCLUDES} ${EVENT_SIM_TESTBENCH}
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${QUIET_IVERILOG}
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${Q}iverilog -g2012 -o "$@" ${TOP_LEVEL_SOURCE} ${SOURCES} ${EVENT_SIM_TESTBENCH}
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${Q}iverilog -g2012 -D CALCULATE_IPC -D OTUPUT_JSON_STATISTICS -o "$@" ${TOP_LEVEL_SOURCE} ${SOURCES} ${EVENT_SIM_TESTBENCH}
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${VERILATOR_BIN}: ${VERILATOR_BIN}.mk
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${Q}make ${MAKEOPTS} OPT_FAST="-O2 -march=native -mtune=native" -C obj_dir -f ../verilator_makefile Vsystem
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${VERILATOR_BIN}.mk: ${VERILATOR_TESTBENCH} ${TOP_LEVEL_SOURCE} ${SOURCES} ${INCLUDES}
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${QUIET_VERILATOR}
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${Q}verilator ${VERILATOR_OPTS} $^
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${Q}verilator -DCALCULATE_IPC -DOTUPUT_JSON_STATISTICS ${VERILATOR_OPTS} $^
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.PHONY: clean
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clean:
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$(call QUIET_CLEAN,system)
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${Q}rm -rf ${SYSTEM_VVP} *.fst boot_code.txt boot_code.bin *memdump *memdumptxt obj_dir
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${Q}rm -rf ${SYSTEM_VVP} *.fst boot_code.txt boot_code.bin *memdump *memdumptxt obj_dir *json
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16
system/biu.v
16
system/biu.v
@ -43,8 +43,16 @@ module BIU (
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/* Internal */ output reg [31:0] INSTRUCTION, output reg VALID_INSTRUCTION, output reg [15:0] INSTRUCTION_LOCATION, input jump_req,
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/* */ input[15:0] ADDRESS_INPUT, inout [15:0] DATA, input write_request, input read_request, input Wbit, output reg VALID_DATA, input MEM_OR_IO,
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/* */ input [`PROC_STATE_BITS-1:0] proc_state, input SIMPLE_MICRO
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`ifdef OTUPUT_JSON_STATISTICS
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/* Statistics */ ,output wire [`L1_CACHE_SIZE-1:0] FIFO_SIZE_STAT, output wire VALID_INSTRUCTION_STAT
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`endif
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);
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`ifdef OTUPUT_JSON_STATISTICS
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assign FIFO_SIZE_STAT = FIFO_SIZE;
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assign VALID_INSTRUCTION_STAT = ((Isit1==1) && (FIFO_SIZE!=0) && `EARLY_VALID_INSTRUCTION_) || ((fifoIsize==2) && (FIFO_SIZE > 1) && `EARLY_VALID_INSTRUCTION_) || ((fifoIsize==3) && (FIFO_SIZE > 2) && `EARLY_VALID_INSTRUCTION_) || (FIFO_SIZE>3);
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`endif
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reg [15:0] data_bus_output_register;
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assign external_data_bus=read?data_bus_output_register:16'hz;
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@ -153,11 +161,11 @@ always @(posedge clock) begin
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end else if(INSTRUCTION_ADDRESS[0:0]==0)begin
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INPUT_FIFO[FIFO_end] <= external_data_bus[7:0];
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FIFO_end <= FIFO_end+4'd1;
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INSTRUCTION_ADDRESS <= INSTRUCTION_ADDRESS+1;
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INSTRUCTION_ADDRESS <= INSTRUCTION_ADDRESS+20'd1;
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end else begin
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INPUT_FIFO[FIFO_end] <= external_data_bus[15:8];
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FIFO_end <= FIFO_end+4'd1;
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INSTRUCTION_ADDRESS <= INSTRUCTION_ADDRESS+1;
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INSTRUCTION_ADDRESS <= INSTRUCTION_ADDRESS+20'd1;
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end
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biu_state <= `BIU_NEXT_ACTION;
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read<=1;
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@ -176,7 +184,7 @@ always @(posedge clock) begin
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end
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`BIU_PUT_UNALIGNED_PREP_NEXT2:begin
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write <= 1;
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DATA_ADDRESS <= DATA_ADDRESS+1;
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DATA_ADDRESS <= DATA_ADDRESS+20'd1;
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BHE <= 1;
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biu_state <= `BIU_WRITE_EXIT;
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end
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@ -245,7 +253,7 @@ always @(posedge clock) begin
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end
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end
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`BIU_GET_SECOND_BYTE:begin
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DATA_ADDRESS <= DATA_ADDRESS+1;
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DATA_ADDRESS <= DATA_ADDRESS+20'd1;
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biu_state <= `BIU_GET_SECOND_BYTE1;
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read <=0;
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end
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@ -22,6 +22,11 @@
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//`define DEBUG_PC_ADDRESS
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//`define DEBUG_DATA_READ_WRITES
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/** OUTPUT **/
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/* These are usually set at build time*/
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//`define CALCULATE_IPC
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//`define OTUPUT_JSON_STATISTICS
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/** Optimisations **/
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/* Enables the ability to check if an instruction in the input
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@ -44,3 +49,7 @@
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`else
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`define EARLY_VALID_INSTRUCTION_ 0
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`endif
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`ifdef OTUPUT_JSON_STATISTICS
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`define CALCULATE_IPC
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`endif
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@ -36,7 +36,16 @@
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//read: active low
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//reset: active low
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module processor ( input clock, input reset, output [19:0] external_address_bus, inout [15:0] external_data_bus,output read, output write,output BHE,output IOMEM, output wire HALT,output [`ERROR_BITS-1:0] ERROR);
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module processor (
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/* MISC */ input clock, input reset, output wire HALT,output [`ERROR_BITS-1:0] ERROR
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/* MEMORY / IO */ ,output [19:0] external_address_bus, inout [15:0] external_data_bus,output read, output write,output BHE,output IOMEM
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`ifdef CALCULATE_IPC
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/* STATISTICS */ ,output reg new_instruction
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`endif
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`ifdef OTUPUT_JSON_STATISTICS
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/* */ ,output wire [`L1_CACHE_SIZE-1:0] L1_SIZE_STAT, output wire VALID_INSTRUCTION_STAT
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`endif
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);
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/* If there is an error either from the decoder or execution unit set it to ERROR */
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assign ERROR=(DE_ERROR!=`ERR_NO_ERROR)?DE_ERROR:(EXEC_ERROR!=`ERR_NO_ERROR)?EXEC_ERROR:`ERR_NO_ERROR;
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@ -99,6 +108,9 @@ BIU BIU(
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/* Internal */ ,INSTRUCTION,VALID_INSTRUCTION,INSTRUCTION_LOCATION,biu_jump_req
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/* */ ,BIU_ADDRESS_INPUT,BIU_DATA,biu_write_request,biu_read_request,Wbit,BIU_VALID_DATA,MEM_OR_IO
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/* */ ,state,SIMPLE_MICRO
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`ifdef OTUPUT_JSON_STATISTICS
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/* Statistics */ ,L1_SIZE_STAT, VALID_INSTRUCTION_STAT
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`endif
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);
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assign BIU_DATA= biu_data_direction ? 16'hz : (memio_address_select ? reg_read_port1_data : ALU_O);
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@ -176,6 +188,9 @@ register_file register_file(
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always @(negedge reset) begin
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state <= `PROC_HALT; //TODO: race condition ??
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`ifdef CALCULATE_IPC
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new_instruction<=0;
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`endif
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end
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always @(posedge reset) begin
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state <= `PROC_RESET;
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@ -211,6 +226,9 @@ always @(posedge clock) begin
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`ifdef DEBUG_PC_ADDRESS
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$display("Running command at %04x (%08x)",INSTRUCTION_LOCATION,INSTRUCTION);
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`endif
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`ifdef CALCULATE_IPC
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new_instruction <= !new_instruction;
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`endif
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ProgCount <= INSTRUCTION_LOCATION+{12'b0,instr_end};
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INSTRUCTION_BUFFER<=INSTRUCTION[23:0];
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end
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@ -19,19 +19,51 @@
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`timescale 1ns/1ps
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`include "error_header.v"
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`include "config.v"
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module system ( input clock,input reset, output [19:0]address_bus, inout [15:0]data_bus,output BHE, output rd, output wr, output IOMEM, output HALT, output [`ERROR_BITS-1:0] ERROR);
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processor p(clock,reset,address_bus,data_bus,rd,wr,BHE,IOMEM,HALT,ERROR);
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`ifdef CALCULATE_IPC
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wire new_instruction;
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`endif
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`ifdef OTUPUT_JSON_STATISTICS
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wire unsigned [`L1_CACHE_SIZE-1:0] L1_SIZE_STAT;
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wire VALID_INSTRUCTION_STAT;
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`endif
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processor p(
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/* MISC */ clock,reset,HALT,ERROR
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/* MEMORY / IO */ ,address_bus,data_bus,rd,wr,BHE,IOMEM
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`ifdef CALCULATE_IPC
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/* STATISTICS */ ,new_instruction
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`endif
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`ifdef OTUPUT_JSON_STATISTICS
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/* */ ,L1_SIZE_STAT, VALID_INSTRUCTION_STAT
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`endif
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);
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doublemem sysmem(address_bus,data_bus,rd,wr,BHE,IOMEM);
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`ifdef OTUPUT_JSON_STATISTICS
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string stats_name;
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integer json_file_descriptor;
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`endif
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string waveform_name;
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initial begin
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if($value$plusargs("WAVEFORM=%s",waveform_name))begin
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$dumpfile(waveform_name);
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$dumpvars(0,p);
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end
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`ifdef OTUPUT_JSON_STATISTICS
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if($value$plusargs("STATS=%s",stats_name))begin
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json_file_descriptor=$fopen(stats_name,"w");
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$fdisplay(json_file_descriptor,"{\n\"L1_size\":%0d,\n\"Cycles\":[",$rtoi($pow(2,`L1_CACHE_SIZE)));
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first_json_cycle = 1;
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end else
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json_file_descriptor=0;
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`endif
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end
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//integer killswitch=0;
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@ -45,16 +77,32 @@ end
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// end
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//end
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`ifdef OTUPUT_JSON_STATISTICS
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reg first_json_cycle;
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always @(negedge clock)begin
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if(HALT==0 && json_file_descriptor!=0)begin
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$fdisplay(json_file_descriptor,"%s{\"C\":%0d,\"L1\":%0d,\"VDI\":%0d}",first_json_cycle?"":",",cycles,L1_SIZE_STAT,VALID_INSTRUCTION_STAT);
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first_json_cycle <= 0;
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end
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end
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`endif
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always @(negedge wr) begin
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if(IOMEM==1'b1 && address_bus[7:0]==8'hA5 )
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$write("%s" ,data_bus[15:8]);
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end
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reg [1:0] finish;
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`ifdef CALCULATE_IPC
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integer instruction_count;
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always @(new_instruction) begin
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instruction_count<=instruction_count+1;
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end
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`endif
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reg [1:0] finish;
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string memdump_name;
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always @(posedge HALT) begin
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$display("Processor halted.\nCycles run for: %d",cycles-1);
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if($value$plusargs("MEMDUMP=%s",memdump_name))begin
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$writememh(memdump_name, sysmem.memory,0,32767);
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end
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@ -65,7 +113,20 @@ always @(posedge clock) begin
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/* Allow some clock cycles for the waveform*/
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case(finish)
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2'd0: begin end
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2'd1: finish <= 2;
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2'd1: begin
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finish <= 2;
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/* instruction_count gets updated at the sme time as HALT is pulled so wait a clock cycle to get an accurate reading*/
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$display("\x1b[7mProcessor halted.\nCycles run for : %0d\x1b[m",cycles);
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`ifdef CALCULATE_IPC
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/* verilator lint_off REALCVT */
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$display("\x1b[7mInstr. per cycle : %f\x1b[m", $itor(instruction_count) / $itor(cycles) );
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/* verilator lint_on REALCVT */
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`endif
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`ifdef OTUPUT_JSON_STATISTICS
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if(json_file_descriptor!=0)
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$fdisplay(json_file_descriptor,"],\n\"Total Cycles\":%0d,\n\"Instructions run\":%0d\n}",cycles,instruction_count);
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`endif
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end
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2'd2: finish <= 3;
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2'd3: $finish;
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endcase
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@ -84,7 +145,7 @@ always @( ERROR ) begin
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$display("Unimplemented addressing mode");
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end
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endcase
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$display("Cycles run for: %d",cycles-1);
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$display("Cycles run for: %0d",cycles-1);
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if($value$plusargs("MEMDUMP=%s",memdump_name))begin
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$writememh(memdump_name, system.sysmem.memory,0,32767);
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end
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@ -92,13 +153,17 @@ always @( ERROR ) begin
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end
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end
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integer cycles=0;
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integer cycles;
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always @(posedge clock)begin
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always @(negedge clock)begin
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if(reset==1)
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cycles<=cycles+1;
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else
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else begin
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cycles<=0;
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`ifdef OTUPUT_JSON_STATISTICS
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instruction_count <= 0;
|
||||
`endif
|
||||
end
|
||||
end
|
||||
|
||||
|
||||
|
||||
@ -46,13 +46,27 @@ clock_gen #(.FREQ(1000)) u1(clk_enable, clock);
|
||||
string memdump_name;
|
||||
initial begin
|
||||
clk_enable = 1;
|
||||
do_reset = 0;
|
||||
end
|
||||
|
||||
reset = 1;
|
||||
#(`CPU_SPEED*2)
|
||||
reset = 0;
|
||||
#($random%1000)
|
||||
#(`CPU_SPEED)
|
||||
reset = 1;
|
||||
reg [1:0]do_reset;
|
||||
|
||||
always @(posedge clock) begin
|
||||
case(do_reset)
|
||||
2'd0:begin
|
||||
do_reset<=1;
|
||||
end
|
||||
2'd1:begin
|
||||
do_reset<=2;
|
||||
reset <= 0;
|
||||
end
|
||||
2'd2:begin
|
||||
do_reset<=3;
|
||||
reset <= 1;
|
||||
end
|
||||
2'd3:begin
|
||||
end
|
||||
endcase
|
||||
end
|
||||
|
||||
endmodule
|
||||
|
||||
56
tools/plot.sh
Executable file
56
tools/plot.sh
Executable file
@ -0,0 +1,56 @@
|
||||
#!/bin/sh
|
||||
set -euf
|
||||
|
||||
print_help(){
|
||||
echo "$0 <json data file> <function> <output filename>"
|
||||
echo " Possible functions:"
|
||||
echo " cache_time : graph of cache utilisation in bytes over time in clock cycles"
|
||||
echo " cache_util_freq : graph of the likelyhood of the cache for each utilisation"
|
||||
}
|
||||
|
||||
if [ "$#" != 3 ] || ! [ -e "$1" ]
|
||||
then
|
||||
print_help
|
||||
exit 1
|
||||
fi
|
||||
|
||||
CSV_FILE=$(mktemp)
|
||||
IN=$1
|
||||
OUT=$3
|
||||
|
||||
jq -r '.Cycles[]| [.C,.L1,.VDI]|@csv' -- "$IN" > "$CSV_FILE"
|
||||
|
||||
BASE_GNUPLOT_OPTIONS="set datafile separator ',';set term svg;set output \"${OUT}\";"
|
||||
|
||||
case "$2" in
|
||||
"cache_time")
|
||||
CACHE_SIZE=$(jq -r .L1_size -- "$IN")
|
||||
gnuplot -e "${BASE_GNUPLOT_OPTIONS}\
|
||||
set xlabel \"Clock cycles\";\
|
||||
set ylabel \"Cache utilisation (bytes)\";\
|
||||
set offsets 0, 0, 3, 1;\
|
||||
set ytics 0,1,$((CACHE_SIZE-1));\
|
||||
unset colorbox;\
|
||||
set ytics add (\"Valid\" -1);\
|
||||
set palette model RGB defined ( 0 'red', 1 'green' );\
|
||||
plot '${CSV_FILE}' using 1:2 with lines notitle ,\
|
||||
'${CSV_FILE}' using 1:(-0.75):(0):(-0.5):3 with vectors nohead palette notitle"
|
||||
|
||||
;;
|
||||
"cache_util_freq")
|
||||
CACHE_SIZE=$(jq -r .L1_size -- "$IN")
|
||||
gnuplot -e "${BASE_GNUPLOT_OPTIONS}\
|
||||
set xlabel \"Utilisation (bytes)\";\
|
||||
set ylabel \"Occurrences\";\
|
||||
set boxwidth 0.5;\
|
||||
set style fill solid 0.4;\
|
||||
set xtics 0,1,$((CACHE_SIZE-1));\
|
||||
set offsets 1, 2, 0, 0;\
|
||||
plot '${CSV_FILE}' using 2:(1) smooth frequency with boxes notitle"
|
||||
|
||||
;;
|
||||
*)
|
||||
print_help;
|
||||
exit 1
|
||||
;;
|
||||
esac
|
||||
Loading…
Reference in New Issue
Block a user