2023-02-22 01:58:08 +00:00
|
|
|
/* ucode.txt - The contents of the microcode rom for the 9086 cpu
|
|
|
|
|
|
|
|
|
|
This file is part of the 9086 project.
|
|
|
|
|
|
|
|
|
|
Copyright (c) 2023 Efthymios Kritikos
|
|
|
|
|
|
|
|
|
|
This program is free software: you can redistribute it and/or modify
|
|
|
|
|
it under the terms of the GNU General Public License as published by
|
|
|
|
|
the Free Software Foundation, either version 3 of the License, or
|
|
|
|
|
(at your option) any later version.
|
|
|
|
|
|
|
|
|
|
This program is distributed in the hope that it will be useful,
|
|
|
|
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
|
|
|
GNU General Public License for more details.
|
|
|
|
|
|
|
|
|
|
You should have received a copy of the GNU General Public License
|
|
|
|
|
along with this program. If not, see <http://www.gnu.org/licenses/>. */
|
2023-02-22 01:28:23 +00:00
|
|
|
|
2023-02-23 14:48:48 +00:00
|
|
|
//imd: IN_MOD
|
|
|
|
|
//
|
|
|
|
|
//rr1: reg_read_port1_addr
|
|
|
|
|
//
|
2023-02-22 01:28:23 +00:00
|
|
|
//a1f: ALU 1 operation (function)
|
|
|
|
|
// 000:ALU_OP_ADD
|
|
|
|
|
// 001:ALU_OP_SUB
|
|
|
|
|
// 010:ALU_OP_AND
|
|
|
|
|
// 011:ALU_OP_OR
|
|
|
|
|
// 100:ALU_OP_XOR
|
|
|
|
|
// 101:ALU_OP_ADD_SIGNED_B
|
2023-02-24 02:18:48 +00:00
|
|
|
// 110:ALU_OP_SUB_REVERSE
|
2023-02-22 01:28:23 +00:00
|
|
|
//
|
2023-02-23 14:48:48 +00:00
|
|
|
//a1o: OUT_MOD. Handled in `PROC_EX_STATE_EXIT
|
2023-02-22 01:28:23 +00:00
|
|
|
//
|
|
|
|
|
//a12: In ALU 1 sel 2
|
|
|
|
|
//
|
|
|
|
|
//a11: In ALU 1 sel 1
|
|
|
|
|
//
|
|
|
|
|
//rwa: Register Write Address
|
|
|
|
|
//
|
|
|
|
|
//nxs: Next State
|
|
|
|
|
// 00: PROC_EX_STATE_ENTRY
|
|
|
|
|
// 01: PROC_DE_LOAD_16_PARAM
|
|
|
|
|
// 10: PROC_DE_LOAD_8_PARAM
|
2023-02-24 02:18:48 +00:00
|
|
|
// 11: PROC_MEMIO_READ
|
2023-02-22 01:28:23 +00:00
|
|
|
//
|
|
|
|
|
//Nxt M: Next microcode address
|
|
|
|
|
|
|
|
|
|
@000 0000_000_000__00__00_0000__00_000000
|
2023-02-23 14:48:48 +00:00
|
|
|
|
2023-02-24 02:18:48 +00:00
|
|
|
// 32 28 25 21 18 15 13 11 7 5 0
|
|
|
|
|
// rr2 |imd|rr1 |a1f|a1o|a12|a11|rwa |nxs|Nxt M |
|
|
|
|
|
@001 0000_011_1100_001_011__00__01_1100__01_000010 // ALU_1: SP ALU_2: PARAM2 (2) ALU_OP:SUB ALU_out: SP (also fetch the opcode argument to PARAM1)
|
|
|
|
|
@002 0000_011_zzzz_000_110__10__11_zzzz__00_000011 // ALU_1: 0 ALU_2: PC ALU_OP:ADD ALU_out: [SP]
|
|
|
|
|
@003 0000_011_zzzz_000_101__10__00_zzzz__00_000000 // ALU_1: PARAM1 (arg) ALU_2: PC ALU_OP:ADD ALU_out: PC
|
2023-02-23 14:48:48 +00:00
|
|
|
|
2023-02-24 02:18:48 +00:00
|
|
|
// rr2|imd|rr1 |a1f|a1o|a12|a11|rwa |nxs|Nxt M |
|
|
|
|
|
@004 0000_110_zzzz_000_101__00__11_zzzz__11_000101 // ALU_1: 0 ALU_2: PARAM2 ([SP) ALU_OP:ADD ALU_out: PC (also read [SP] to PARAM2)
|
|
|
|
|
@005 0000_011_1100_000_011__01__00_1100__00_000000 // ALU_1: PARAM1 (2) ALU_2: SP ALU_OP:ADD ALU_out: SP
|
