9086/.gitignore

*.vvp
*.vpi
*.fst
*.o
*.bf.asm
*.swp
*.memdump
*.json
*.dfu
*.bit
*.fst.hier
abc.history
boot_code/*.bin
boot_code/*.txt
boot_code/*.stxt
system/boot_code.bin
system/boot_code.txt
system/obj_dir/
system/simplified_ucode.txt
system/build/
tools/*svg
system/external_ip/litedram_core_ecp5_phy.v
system/external_ip/litedram_core_ecp5_phy_sim.v
Basic start for the control block 2023-02-08 09:18:00 +00:00			`*.vvp`
			`*.vpi`
Wrote a more complete testbench for verilator, switched from lx2 to fst and fixed cpu clock frequency calculation 2023-03-05 00:10:55 +00:00			`*.fst`
Basic start for the control block 2023-02-08 09:18:00 +00:00			`*.o`
Cleaned up boot_code 2023-03-03 19:36:28 +00:00			`*.bf.asm`
Implemented a basic Instruction Fetch stage and added some examples in the 8086 doc 2023-02-08 23:59:06 +00:00			`*.swp`
Improved build system and project directory structure 2023-02-16 01:46:22 +00:00			`*.memdump`
Added code to record statistics and a tool to plot them 2023-05-14 15:06:33 +00:00			`*.json`
Added support to the build system for synthesising, place and routing, serialising and uploading the design to a Lattice ECP5 OrangeCrab FPGA 2023-11-02 00:29:14 +00:00			`*.dfu`
			`*.bit`
Project: removed a .fst.hier file thought to be generated by gtkwave and added the type to gitignore 2023-11-15 00:32:40 +00:00			`*.fst.hier`
Added support to the build system for synthesising, place and routing, serialising and uploading the design to a Lattice ECP5 OrangeCrab FPGA 2023-11-02 00:29:14 +00:00			`abc.history`
Added support for some more instructions, fixed a bug in CMP and also added a program that uses them 2023-05-19 16:59:20 +00:00			`boot_code/*.bin`
			`boot_code/*.txt`
Peripherals/Memory: Added support for the litedram DDR memory controller, created a new memory map and updated all relevant code and files including the addition of rudimentary wait state support for the cpu (BIU) 2023-12-03 19:24:12 +00:00			`boot_code/*.stxt`
Improved build system and project directory structure 2023-02-16 01:46:22 +00:00			`system/boot_code.bin`
			`system/boot_code.txt`
Added support for Verilator! 2023-03-04 08:37:43 +00:00			`system/obj_dir/`
Made the build system simplify the microcode so that yosys understands and synthesises it! Now gnome_sort.asm almost works! 2023-11-12 04:04:56 +00:00			`system/simplified_ucode.txt`
Build system: Improved the handling of seeds, moved most of the board specific build instructions to the board specific .mk file and fixed bios.asm dependencies 2023-12-05 21:46:46 +00:00			`system/build/`
Added code to record statistics and a tool to plot them 2023-05-14 15:06:33 +00:00			`tools/*svg`
Peripherals/Memory: Added support for the litedram DDR memory controller, created a new memory map and updated all relevant code and files including the addition of rudimentary wait state support for the cpu (BIU) 2023-12-03 19:24:12 +00:00			`system/external_ip/litedram_core_ecp5_phy.v`
Build system: Added the ability to simulate an FPGA SoC and fixed all the warning verilator gave of the code previously used only for synthesis. 2023-12-07 16:39:04 +00:00			`system/external_ip/litedram_core_ecp5_phy_sim.v`