9086/system/fpga_config/OrangeCrab_r0.2.1/testbench.cpp

#include "Vfpga_top.h"
#include "verilated.h"
#include "stdio.h"

Vfpga_top *system_state;
VerilatedContext* contextp;

/*In hz */
#define CPU_SPEED 1000

#define timeinc CPU_SPEED*1000000/2

void tick() {
	system_state->clk48 = 1;
	contextp->timeInc(timeinc);
	system_state->eval();
	system_state->clk48 = 0;
	contextp->timeInc(timeinc);
	system_state->eval();
}

int main(int argc, char** argv) {
	contextp = new VerilatedContext;

	// Set debug level, 0 is off, 9 is highest presently used
	// May be overridden by commandArgs argument parsing
	contextp->debug(0);

	// Verilator must compute traced signals
	contextp->traceEverOn(true);

	contextp->commandArgs(argc, argv);
	system_state = new Vfpga_top{contextp};
	system_state->user_button=1;
	system_state->i2c_sda_in=0;

	//system_state->reset=1;
	tick();
	//system_state->reset=0;
	tick();
	tick();
	//system_state->reset=1;

	// Simulate until $finish
	while(!contextp->gotFinish()){
		tick();
	}

	system_state->final();

	delete system_state;
	delete contextp;
	return 0;
}