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9086/boot_code/brainfuck_compiled.asm

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NASM
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Improved DOS char print code
2023-03-14 07:20:30 +00:00
; Interrupt table and routines
Added the OUT instruction to be able to properly address I/O and moved printing logic to a device on the I/O space. Also added IRET which is basically just a RET in this case
2023-03-09 06:02:41 +00:00
Added partial support for the software interrupt INT instruction
2023-03-08 07:26:28 +00:00
org 0x100
Peripherals/Memory: Added support for the litedram DDR memory controller, created a new memory map and updated all relevant code and files including the addition of rudimentary wait state support for the cpu (BIU)
2023-12-03 19:24:12 +00:00
output_program:
org 0xF800
mov sp,#SMALL_STACK
call INIT_INT_VECT_TABLE
Wrote an optimised native brainfuck compiler intended to be the default program running on release v0.1 utilising a good precentage of the 8086 instruction set
2023-02-19 21:42:59 +00:00
INCLUDE brainfuck_compiler_v1.asm
Peripherals/Memory: Added support for the litedram DDR memory controller, created a new memory map and updated all relevant code and files including the addition of rudimentary wait state support for the cpu (BIU)
2023-12-03 19:24:12 +00:00
SMALL_STACK:
Wrote an optimised native brainfuck compiler intended to be the default program running on release v0.1 utilising a good precentage of the 8086 instruction set
2023-02-19 21:42:59 +00:00
Peripherals/Memory: Added support for the litedram DDR memory controller, created a new memory map and updated all relevant code and files including the addition of rudimentary wait state support for the cpu (BIU)
2023-12-03 19:24:12 +00:00
INCLUDE dos_layer.asm
Wrote an optimised native brainfuck compiler intended to be the default program running on release v0.1 utilising a good precentage of the 8086 instruction set
2023-02-19 21:42:59 +00:00
prog:
Cleaned up boot_code
2023-03-03 19:36:28 +00:00
INCLUDE hello_9086.bf.asm
Added the OUT instruction to be able to properly address I/O and moved printing logic to a device on the I/O space. Also added IRET which is basically just a RET in this case
2023-03-09 06:02:41 +00:00
Added partial support for the software interrupt INT instruction
2023-03-08 07:26:28 +00:00
.ORG 0xFFF0
Peripherals/Memory: Added support for the litedram DDR memory controller, created a new memory map and updated all relevant code and files including the addition of rudimentary wait state support for the cpu (BIU)
2023-12-03 19:24:12 +00:00
MOV AX,#0xF800
Added partial support for the software interrupt INT instruction
2023-03-08 07:26:28 +00:00
JMP AX
Peripherals/Memory: Added support for the litedram DDR memory controller, created a new memory map and updated all relevant code and files including the addition of rudimentary wait state support for the cpu (BIU)
2023-12-03 19:24:12 +00:00
.ORG 0xFFFF
DB 0x00 ;Make sure a full 64KiB image
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