diff --git a/test.md b/test.md
index 527cd48..8f3b0a0 100644
--- a/test.md
+++ b/test.md
@@ -32,7 +32,7 @@ Specifically this list shows the software needed and the versions used during de
 After that you can run `make` on the top level directory and it should build everything and start the simulation
 
 ### Synthesis and bitstream creation ( for FPGAs )
-Synthesis is based on yosys. You need to select your board in [common.mk](./common.mk) which is basically a directory inside [system/fpga\_config/](system/fpga_config/) which had configuration files specifically for that board. You should also check inside your board directory for config.mk for further configuration options specific to the board. Then you can run `make upload` in the top level directory and it should create the bitstream and upload it.
+Synthesis is based on yosys. You need to select your board in [common.mk](./common.mk) which is basically a directory inside [system/fpga\_config/](system/fpga_config/) which has configuration files specific to that board. You should also check inside your board directory for config.mk for further board-specific configuration options. Then you can run `make upload` in the top level directory and it should create the bitstream and upload it.
 
 This list shows the software needed and the versions used during development
 
@@ -42,12 +42,12 @@ This list shows the software needed and the versions used during development
 * xxd : 2022-01-14
 * POSIX coreutils : GNU coreutils 9.4
 
-For ECP5 FPGAs:
+Additionally, for ECP5 FPGAs:
 
 * prjtrellis : 1.4 ( database commit 4dda149b9e4f1753ebc8b011ece2fe794be1281a )
 * nextpnr : 0.6
 
-For FPGAs using the [foboot](https://github.com/im-tomu/foboot) bootloader
+Additionally, for FPGAs using the [foboot](https://github.com/im-tomu/foboot) bootloader
 
 * dfu-util : 0.11