From 10f33ac6512f25549cca7507bebe013a400c1108 Mon Sep 17 00:00:00 2001 From: "(Tim) Efthimis Kritikos" Date: Tue, 7 Nov 2023 13:48:36 +0000 Subject: [PATCH] edits --- test.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/test.md b/test.md index 659153c..22f7d73 100644 --- a/test.md +++ b/test.md @@ -20,7 +20,7 @@ A CPU that aims to be binary compatible with the 8086 ISA, focused on optimisati 9086 logo ### Simulating it -Both Verilator and Icarus Verilog can be used for simulation. You can select which one you want with the SIM variable on [common.mk](./common.mk) +Both Verilator and Icarus Verilog can be used for simulation. You can select which one you want with the SIM variable on [./common.mk](./common.mk) Specifically this list shows the software needed and the versions used during development (other versions should work as well) * Icarus Verilog : version 12.0 OR **(preferred)** Verilator : 5.016 @@ -32,7 +32,7 @@ Specifically this list shows the software needed and the versions used during de After that you can run `make` on the top level directory and it should build everything and start the simulation ### Synthesis and bitstream creation ( for FPGAs ) -Synthesis is based on Yosys. You need to set FPGA\_BOARD in [common.mk](./common.mk) to the name of a directory inside [system/fpga\_config/](system/fpga_config/). You should also check inside your board directory for config.mk for further board-specific configuration options. Then you can run `make upload` in the top level directory and it should create the bitstream and upload it. +Synthesis is based on Yosys. You need to set FPGA\_BOARD in [./common.mk](./common.mk) to the name of a directory inside [./system/fpga\_config/](system/fpga_config/). You should also check inside your board directory for config.mk for further board-specific configuration options. Then you can run `make upload` in the top level directory and it should create the bitstream and upload it. This list shows the software needed and the versions used during development