290 lines
8.4 KiB
C
290 lines
8.4 KiB
C
#include "simdata.h"
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#include "cpu.h"
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#include <stdlib.h>
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struct fetch_data_t *malloc_fetch_data(){
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return NULL;
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}
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void free_fetch_data(__attribute__((unused)) struct fetch_data_t *tofree){
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}
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int fetch(struct simdata_t *simdata){
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simdata->decode_data->in_bytecode=(uint32_t)(simdata->RAM[simdata->PC])<<24|(uint32_t)(simdata->RAM[simdata->PC+1])<<16|(uint32_t)(simdata->RAM[simdata->PC+2])<<8|(uint32_t)(simdata->RAM[simdata->PC+3]);
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simdata->PC+=4;
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return 0;
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}
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struct decode_data_t *malloc_decode_data(){
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return malloc(sizeof(struct decode_data_t));
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}
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void free_decode_data(struct decode_data_t *tofree){
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free(tofree);
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}
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int decode(struct simdata_t *simdata){
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uint16_t opcode,op1,op2,imm;
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switch((simdata->decode_data->in_bytecode&0xE0000000)>>29){
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case 0:
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opcode=(simdata->decode_data->in_bytecode&0x1F000000)>>24;
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switch(opcode){
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case 0:
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simdata->exec_data->EXEC_ACTION=NOP;
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break;
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case 1:
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case 2:
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case 3:
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case 4:
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case 5:
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switch(opcode){
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case 1: simdata->exec_data->COND=NONE; break;
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case 2: simdata->exec_data->COND=ZERO; break;
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case 3: simdata->exec_data->COND=NZERO; break;
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case 4: simdata->exec_data->COND=CARRY; break;
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case 5: simdata->exec_data->COND=NCARRY; break;
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}
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simdata->exec_data->out_op->OP_ADDR=IMMEDIATE;
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simdata->exec_data->out_op->data=simdata->decode_data->in_bytecode&0x00FFFFFF;
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simdata->exec_data->EXEC_ACTION=JUMP;
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break;
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default:
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return 1;
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}
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break;
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case 1:
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opcode=(simdata->decode_data->in_bytecode&0x1FFF0000)>>16;
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op1=(simdata->decode_data->in_bytecode&0x0000FF00)>>8;
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op2=(simdata->decode_data->in_bytecode&0x000000FF);
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simdata->exec_data->in_op1->OP_ADDR=REGISTER;
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simdata->exec_data->in_op1->data=op1;
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simdata->exec_data->in_op2->OP_ADDR=REGISTER;
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simdata->exec_data->in_op2->data=op2;
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switch(opcode){
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case 5:
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simdata->exec_data->EXEC_ACTION=HALT;
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break;
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default:
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simdata->exec_data->EXEC_ACTION=EXEC_ALU;
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break;
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}
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switch(opcode){
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case 0:
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case 1:
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case 4:
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simdata->exec_data->out_op->OP_ADDR=REGISTER;
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simdata->exec_data->out_op->data=op2;
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break;
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case 2:
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case 3:
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simdata->exec_data->out_op->OP_ADDR=REGISTER;
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simdata->exec_data->out_op->data=op1;
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break;
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}
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switch(opcode){
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case 0: simdata->exec_data->ALU_OP=ALU_ADD; break;
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case 1: simdata->exec_data->ALU_OP=ALU_SUB; break;
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case 2: simdata->exec_data->ALU_OP=ALU_SL; break;
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case 3: simdata->exec_data->ALU_OP=ALU_SR; break;
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case 4: simdata->exec_data->ALU_OP=ALU_CMP; break;
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case 5: break;
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default:
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return 1;
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}
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break;
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case 2:
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opcode=(simdata->decode_data->in_bytecode&0x1F000000)>>24;
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op1=(simdata->decode_data->in_bytecode&0x00FF0000)>>16;
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imm=(simdata->decode_data->in_bytecode&0x0000FFFF);
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switch(opcode){
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case 0:
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simdata->exec_data->EXEC_ACTION=MOVE;
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simdata->exec_data->in_op1->OP_ADDR=IMMEDIATE;
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simdata->exec_data->in_op1->data=imm;
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simdata->exec_data->out_op->OP_ADDR=REGISTERL;
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simdata->exec_data->out_op->data=op1;
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break;
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case 1:
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simdata->exec_data->EXEC_ACTION=MOVE;
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simdata->exec_data->in_op1->OP_ADDR=IMMEDIATE;
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simdata->exec_data->in_op1->data=imm;
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simdata->exec_data->out_op->OP_ADDR=REGISTERH;
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simdata->exec_data->out_op->data=op1;
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break;
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}
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break;
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default:
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return 1;
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}
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return 0;
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}
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struct exec_data_t *malloc_exec_data(){
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struct exec_data_t *ret;
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ret=malloc(sizeof(struct exec_data_t));
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if(!ret)
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return 0;
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ret->in_op1=malloc(sizeof(struct exec_op_t));
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if(!ret->in_op1){
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free(ret);
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return 0;
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}
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ret->in_op2=malloc(sizeof(struct exec_op_t));
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if(!ret->in_op2){
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free(ret->in_op1);
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free(ret);
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return 0;
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}
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ret->out_op=malloc(sizeof(struct exec_op_t));
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if(!ret->out_op){
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free(ret->in_op1);
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free(ret->in_op2);
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free(ret);
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return 0;
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}
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return ret;
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}
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void free_exec_data(struct exec_data_t *tofree){
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free(tofree->in_op1);
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free(tofree->in_op2);
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free(tofree->out_op);
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free(tofree);
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}
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int exec(struct simdata_t *simdata){
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switch(simdata->exec_data->EXEC_ACTION){
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case JUMP:
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int condition=0;
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switch(simdata->exec_data->COND){
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case NONE: condition=1; break;
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case ZERO: condition=simdata->registers->FLAGS&1; break;
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case NZERO: condition=!(simdata->registers->FLAGS&1); break;
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case CARRY: condition=simdata->registers->FLAGS&2; break;
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case NCARRY: condition=!(simdata->registers->FLAGS&2); break;
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}
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if(condition){
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if(simdata->exec_data->out_op->OP_ADDR==IMMEDIATE)
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simdata->PC=simdata->exec_data->out_op->data;
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else
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return 1;
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}
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break;
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case EXEC_ALU:
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if( simdata->exec_data->in_op1->OP_ADDR==REGISTER &&
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simdata->exec_data->in_op2->OP_ADDR==REGISTER &&
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simdata->exec_data->out_op->OP_ADDR==REGISTER ){
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uint32_t result;
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switch(simdata->exec_data->ALU_OP){
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case ALU_ADD:
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result = simdata->registers->GPR[simdata->exec_data->in_op1->data] +
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simdata->registers->GPR[simdata->exec_data->in_op2->data];
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simdata->registers->FLAGS=(simdata->registers->FLAGS&0xFFFFFFFD)|
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(simdata->registers->GPR[simdata->exec_data->out_op->data] < simdata->registers->GPR[simdata->exec_data->in_op1->data])<<1;
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break;
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case ALU_SUB:
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case ALU_CMP:
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result = simdata->registers->GPR[simdata->exec_data->in_op1->data] -
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simdata->registers->GPR[simdata->exec_data->in_op2->data];
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simdata->registers->FLAGS=(simdata->registers->FLAGS&0xFFFFFFFD)|
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(simdata->registers->GPR[simdata->exec_data->out_op->data] > simdata->registers->GPR[simdata->exec_data->in_op1->data])<<1;
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break;
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case ALU_SL:
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simdata->registers->FLAGS=(simdata->registers->FLAGS&0xFFFFFFFD)|
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((simdata->registers->GPR[simdata->exec_data->in_op1->data]&0x80000000)?2:0);
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result = simdata->registers->GPR[simdata->exec_data->in_op1->data]<<1;
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break;
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case ALU_SR:
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simdata->registers->FLAGS=(simdata->registers->FLAGS&0xFFFFFFFD)|
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((simdata->registers->GPR[simdata->exec_data->in_op1->data]&0x00000001)?2:0);
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result = simdata->registers->GPR[simdata->exec_data->in_op1->data]>>1;
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break;
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default:
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return 1;
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}
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simdata->registers->FLAGS=(simdata->registers->FLAGS&0xFFFFFFFE)|(result==0);
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if(simdata->exec_data->ALU_OP!=ALU_CMP)
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simdata->registers->GPR[simdata->exec_data->out_op->data]=result;
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}else
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return 1;
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break;
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case MOVE:
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switch(simdata->exec_data->out_op->OP_ADDR){
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case REGISTERL:
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if(simdata->exec_data->in_op1->OP_ADDR==IMMEDIATE)
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simdata->registers->GPR[simdata->exec_data->out_op->data]=(simdata->registers->GPR[simdata->exec_data->out_op->data]&0xFFFF0000)|(0x0000FFFF&
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simdata->exec_data->in_op1->data);
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else
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simdata->registers->GPR[simdata->exec_data->out_op->data]=(simdata->registers->GPR[simdata->exec_data->out_op->data]&0xFFFF0000)|(0x0000FFFF&
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simdata->registers->GPR[simdata->exec_data->in_op1->data]);
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break;
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case REGISTERH:
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if(simdata->exec_data->in_op1->OP_ADDR==IMMEDIATE)
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simdata->registers->GPR[simdata->exec_data->out_op->data]=(simdata->registers->GPR[simdata->exec_data->out_op->data]&0x0000FFFF)|((0x0000FFFF&
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simdata->exec_data->in_op1->data)<<16);
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else
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simdata->registers->GPR[simdata->exec_data->out_op->data]=(simdata->registers->GPR[simdata->exec_data->out_op->data]&0x0000FFFF)|((0x0000FFFF&
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simdata->registers->GPR[simdata->exec_data->in_op1->data])<<16);
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break;
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default:
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return 1;
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}
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case NOP: break;
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case HALT:
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simdata->cpu_state=CPU_HALTED;
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break;
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}
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return 0;
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}
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int state=0;
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int cpu_cycle_clock(struct simdata_t *simdata){
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switch(state){
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case 0: if( fetch(simdata) ) return 3; break;
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case 1: if( decode(simdata) ) return 2; break;
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case 2: if( exec(simdata) ) return 1; break;
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}
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if(state==2)
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state=0;
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else
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state++;
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return 0;
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}
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int cpu_simdata_malloc(struct simdata_t *simdata){
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simdata->fetch_data=malloc_fetch_data();
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simdata->decode_data=malloc_decode_data();
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simdata->exec_data=malloc_exec_data();
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simdata->registers=malloc(sizeof(struct registers_t));
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if((simdata->fetch_data!=NULL)&&(simdata->decode_data!=NULL)&&(simdata->exec_data!=NULL))
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return 1;
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else
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return 0;
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}
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void cpu_simdata_free(struct simdata_t *simdata){
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free_fetch_data(simdata->fetch_data);
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free_decode_data(simdata->decode_data);
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free_exec_data(simdata->exec_data);
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free(simdata->registers);
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}
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