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No commits in common. "a03111927221ef3bffb88073331644f0d22d13d1" and "8f817a17b77ac2ed8ff9309bcc187c3ea3db3c68" have entirely different histories.
a031119272
...
8f817a17b7
35
assembly.c
35
assembly.c
@ -116,12 +116,6 @@
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// | 14'hE | Calculate the sin of a register | YES | operand | |
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// +-------+---------------------------------------------+--------------+------------+------------+
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// | 14'hF | Calculate the cos of a register | YES | operand | |
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// +-------+---------------------------------------------+--------------+------------+------------+
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// | 14'h10| DEC | YES | operand | |
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// +-------+---------------------------------------------+--------------+------------+------------+
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// | 14'h11| INC | YES | operand | |
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// +-------+---------------------------------------------+--------------+------------+------------+
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// | 14'h12| MOV | YES | operand | |
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//
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//
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// INSTRUCTION FORMAT 2 OPCODE NUM:
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@ -239,15 +233,6 @@ char *disassemble(uint32_t opcode_be){
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case 0x0F:
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snprintf(ret,MAX_INSTRUCTION_LENGTH,"COS %%R%0d",val1);
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break;
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case 0x10:
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snprintf(ret,MAX_INSTRUCTION_LENGTH,"DEC %%R%0d",val1);
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break;
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case 0x11:
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snprintf(ret,MAX_INSTRUCTION_LENGTH,"INC %%R%0d",val1);
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break;
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case 0x12:
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snprintf(ret,MAX_INSTRUCTION_LENGTH,"MOV %%R%0d,%%R%0d",val1,val2);
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break;
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default:
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snprintf(ret,MAX_INSTRUCTION_LENGTH,"UNRECOGNISED INSTRUCTION");
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break;
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@ -464,14 +449,6 @@ int64_t assemble_line(char *line, struct assembler_context_t *assembler_context)
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x=3;
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opcode=0x200F;
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params=1;
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}else if(strncmp(line,"DEC ",4)==0){
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x=3;
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opcode=0x2010;
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params=1;
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}else if(strncmp(line,"INC ",4)==0){
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x=3;
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opcode=0x2011;
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params=1;
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}else
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params=0;
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if(params!=0){
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@ -601,18 +578,6 @@ int64_t assemble_line(char *line, struct assembler_context_t *assembler_context)
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return -2;
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}else
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return -2;
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}else if(line[x]=='%'){
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x++;
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if(line[x]=='R'){
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x++;
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if(line[x]>='0'&&line[x]<='7'){
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r1=line[x]-'0';
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return 0x20120000|(r0&0xFF)<<8|(r1&0xFF);
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}else
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return -2;
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}else
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return -2;
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}else
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return -2;
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}else
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22
cpu.c
22
cpu.c
@ -97,9 +97,6 @@ int decode(struct simdata_t *simdata){
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case 0x0D:
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case 0x0E:
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case 0x0F:
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case 0x10:
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case 0x11:
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case 0x12:
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simdata->exec_data->in_op1->OP_ADDR=REGISTER;
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simdata->exec_data->in_op2->OP_ADDR=REGISTER;
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break;
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@ -125,7 +122,6 @@ int decode(struct simdata_t *simdata){
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break;
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case 0x08:
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case 0x09:
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case 0x12:
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simdata->exec_data->EXEC_ACTION=MOVE;
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break;
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default:
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@ -141,7 +137,6 @@ int decode(struct simdata_t *simdata){
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case 0x0B:
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case 0x0C:
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case 0x0D:
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case 0x12:
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simdata->exec_data->out_op->OP_ADDR=REGISTER;
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simdata->exec_data->out_op->data=op2;
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break;
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@ -149,8 +144,6 @@ int decode(struct simdata_t *simdata){
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case 0x03:
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case 0x0E:
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case 0x0F:
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case 0x10:
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case 0x11:
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simdata->exec_data->out_op->OP_ADDR=REGISTER;
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simdata->exec_data->out_op->data=op1;
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break;
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@ -176,7 +169,6 @@ int decode(struct simdata_t *simdata){
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case 0x07:
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case 0x08:
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case 0x09:
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case 0x12:
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break;
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case 0x0A: simdata->exec_data->ALU_OP=ALU_FDIV; break;
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case 0x0B: simdata->exec_data->ALU_OP=ALU_FMUL; break;
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@ -184,8 +176,6 @@ int decode(struct simdata_t *simdata){
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case 0x0D: simdata->exec_data->ALU_OP=ALU_FSUB; break;
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case 0x0E: simdata->exec_data->ALU_OP=ALU_FSIN; break;
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case 0x0F: simdata->exec_data->ALU_OP=ALU_FCOS; break;
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case 0x10: simdata->exec_data->ALU_OP=ALU_DEC; break;
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case 0x11: simdata->exec_data->ALU_OP=ALU_INC; break;
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default:
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return 1;
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}
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@ -335,16 +325,6 @@ int exec(struct simdata_t *simdata){
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case ALU_FCOS:
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*(float*)&result = cosf(*(float*)(&simdata->registers->GPR[simdata->exec_data->in_op1->data]));
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break;
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case ALU_DEC:
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*(uint32_t*)&result = *(uint32_t*)(&simdata->registers->GPR[simdata->exec_data->in_op1->data])-1;
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simdata->registers->FLAGS=(simdata->registers->FLAGS&0xFFFFFFFD)|
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(simdata->registers->GPR[simdata->exec_data->out_op->data] > simdata->registers->GPR[simdata->exec_data->in_op1->data])<<1;
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break;
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case ALU_INC:
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*(uint32_t*)&result = *(uint32_t*)(&simdata->registers->GPR[simdata->exec_data->in_op1->data])+1;
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simdata->registers->FLAGS=(simdata->registers->FLAGS&0xFFFFFFFD)|
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(simdata->registers->GPR[simdata->exec_data->out_op->data] > simdata->registers->GPR[simdata->exec_data->in_op1->data])<<1;
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break;
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default:
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return 1;
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}
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@ -390,8 +370,6 @@ int exec(struct simdata_t *simdata){
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simdata->registers->GPR[simdata->exec_data->out_op->data]=*(uint32_t*)(simdata->RAM+simdata->registers->GPR[simdata->exec_data->in_op1->data]);
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else
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return 2;
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}else if(simdata->exec_data->in_op1->OP_ADDR==REGISTER){
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simdata->registers->GPR[simdata->exec_data->out_op->data]=simdata->registers->GPR[simdata->exec_data->in_op1->data];
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}else
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return 1;
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break;
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